<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22769">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/skylake: Remove set_subsystem() from SoC<br><br>Intel common PCI driver is handle PCI subsystem ID<br>programming, hence no need to have an explicit soc<br>function to do the same.<br><br>TEST=PCI subsystem id is getting programming during<br>pci enumeration.<br><br>Change-Id: Iead57a286b26d532e578cfff99f412c23fd4c2fe<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/skylake/chip.c<br>M src/soc/intel/skylake/chip_fsp20.c<br>2 files changed, 0 insertions(+), 19 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/22769/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c<br>index 3e33053..fa51607 100644<br>--- a/src/soc/intel/skylake/chip.c<br>+++ b/src/soc/intel/skylake/chip.c<br>@@ -802,18 +802,3 @@<br>                 original->SendVrMbxCmd,<br>            params->SendVrMbxCmd);<br> }<br>-<br>-static void pci_set_subsystem(device_t dev, unsigned int vendor,<br>-  unsigned int device)<br>-{<br>-     if (!vendor || !device)<br>-              pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,<br>-                                pci_read_config32(dev, PCI_VENDOR_ID));<br>-   else<br>-         pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,<br>-                                (device << 16) | vendor);<br>-}<br>-<br>-struct pci_operations soc_pci_ops = {<br>-    .set_subsystem = &pci_set_subsystem<br>-};<br>diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c<br>index 8e5cc2a..f4060b2 100644<br>--- a/src/soc/intel/skylake/chip_fsp20.c<br>+++ b/src/soc/intel/skylake/chip_fsp20.c<br>@@ -293,10 +293,6 @@<br>   soc_irq_settings(params);<br> }<br> <br>-struct pci_operations soc_pci_ops = {<br>-     .set_subsystem = &pci_dev_set_subsystem<br>-};<br>-<br> /* Mainboard GPIO Configuration */<br> __attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params)<br> {<br></pre><p>To view, visit <a href="https://review.coreboot.org/22769">change 22769</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22769"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iead57a286b26d532e578cfff99f412c23fd4c2fe </div>
<div style="display:none"> Gerrit-Change-Number: 22769 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>