<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22768">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/block: Add option to have subsystem_id in common pci driver<br><br>This patch ensures all Intel common PCI devices can<br>have subsystem ID programmed alongwith PCI resource<br>enabling (.enable_resources) as part of PCI enumeration<br>process.<br><br>TEST=Build and boot KBL/CNL/APL/GLK to ensure PCI<br>subsystem ID getting programmed.<br>Example:<br>Enabling resources...<br>PCI: 00:00.0 subsystem <- 8086/590c<br>PCI: 00:00.0 cmd <- 06<br>PCI: 00:02.0 subsystem <- 8086/591e<br><br>Change-Id: I46307b0db78c8864c85865bd0f3328d5141971be<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/common/block/cse/cse.c<br>M src/soc/intel/common/block/dsp/dsp.c<br>M src/soc/intel/common/block/graphics/graphics.c<br>M src/soc/intel/common/block/i2c/i2c.c<br>M src/soc/intel/common/block/lpc/lpc.c<br>M src/soc/intel/common/block/p2sb/p2sb.c<br>M src/soc/intel/common/block/pcie/pcie.c<br>M src/soc/intel/common/block/pmc/pmc.c<br>M src/soc/intel/common/block/sata/sata.c<br>M src/soc/intel/common/block/scs/sd.c<br>M src/soc/intel/common/block/smbus/smbus.c<br>M src/soc/intel/common/block/spi/spi.c<br>M src/soc/intel/common/block/sram/sram.c<br>M src/soc/intel/common/block/systemagent/systemagent.c<br>M src/soc/intel/common/block/uart/uart.c<br>M src/soc/intel/common/block/xdci/xdci.c<br>M src/soc/intel/common/block/xhci/xhci.c<br>17 files changed, 102 insertions(+), 12 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/22768/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c<br>index 77a9b63..99caef4 100644<br>--- a/src/soc/intel/common/block/cse/cse.c<br>+++ b/src/soc/intel/common/block/cse/cse.c<br>@@ -497,11 +497,16 @@<br> pci_dev_set_resources(dev);<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations cse_ops = {<br> .set_resources = cse_set_resources,<br> .read_resources = pci_dev_read_resources,<br> .enable_resources = pci_dev_enable_resources,<br> .init = pci_dev_init,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c<br>index 5b4f932..222be18 100644<br>--- a/src/soc/intel/common/block/dsp/dsp.c<br>+++ b/src/soc/intel/common/block/dsp/dsp.c<br>@@ -18,10 +18,15 @@<br> #include <device/pci.h><br> #include <device/pci_ids.h><br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations dsp_dev_ops = {<br> .read_resources = &pci_dev_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br>+ .ops_pci = &pci_ops,<br> .scan_bus = &scan_static_bus,<br> };<br> <br>diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c<br>index 544ae96..2e0fef8 100644<br>--- a/src/soc/intel/common/block/graphics/graphics.c<br>+++ b/src/soc/intel/common/block/graphics/graphics.c<br>@@ -94,11 +94,16 @@<br> graphics_gtt_write(reg, val);<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static const struct device_operations graphics_ops = {<br> .read_resources = pci_dev_read_resources,<br> .set_resources = pci_dev_set_resources,<br> .enable_resources = pci_dev_enable_resources,<br> .init = graphics_soc_init,<br>+ .ops_pci = &pci_ops,<br> .write_acpi_tables = graphics_soc_write_acpi_opregion,<br> };<br> <br>diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c<br>index c6f3be2..12a1efb 100644<br>--- a/src/soc/intel/common/block/i2c/i2c.c<br>+++ b/src/soc/intel/common/block/i2c/i2c.c<br>@@ -166,12 +166,17 @@<br> .transfer = lpss_i2c_dev_transfer,<br> };<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations i2c_dev_ops = {<br> .read_resources = &pci_dev_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .scan_bus = &scan_smbus,<br> .ops_i2c_bus = &i2c_bus_ops,<br>+ .ops_pci = &pci_ops,<br> .init = &lpss_i2c_dev_init,<br> .acpi_fill_ssdt_generator = &lpss_i2c_acpi_fill_ssdt,<br> };<br>diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c<br>index d425667..4519e33 100644<br>--- a/src/soc/intel/common/block/lpc/lpc.c<br>+++ b/src/soc/intel/common/block/lpc/lpc.c<br>@@ -88,14 +88,19 @@<br> set_child_resources(dev);<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations device_ops = {<br>- .read_resources = soc_lpc_read_resources,<br>- .set_resources = set_resources,<br>- .enable_resources = pci_dev_enable_resources,<br>- .write_acpi_tables = southbridge_write_acpi_tables,<br>- .acpi_inject_dsdt_generator = southbridge_inject_dsdt,<br>- .init = lpc_init,<br>- .scan_bus = scan_lpc_bus,<br>+ .read_resources = soc_lpc_read_resources,<br>+ .set_resources = set_resources,<br>+ .enable_resources = pci_dev_enable_resources,<br>+ .write_acpi_tables = southbridge_write_acpi_tables,<br>+ .acpi_inject_dsdt_generator = southbridge_inject_dsdt,<br>+ .init = lpc_init,<br>+ .scan_bus = scan_lpc_bus,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c<br>index 63b9c85..f9d3508 100644<br>--- a/src/soc/intel/common/block/p2sb/p2sb.c<br>+++ b/src/soc/intel/common/block/p2sb/p2sb.c<br>@@ -61,9 +61,14 @@<br> mmio_resource(dev, PCI_BASE_ADDRESS_0, P2SB_BAR / KiB, P2SB_SIZE / KiB);<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static const struct device_operations device_ops = {<br> .read_resources = read_resources,<br> .set_resources = DEVICE_NOOP,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c<br>index 19133f0..7d383fd 100644<br>--- a/src/soc/intel/common/block/pcie/pcie.c<br>+++ b/src/soc/intel/common/block/pcie/pcie.c<br>@@ -24,6 +24,8 @@<br> #define PCIE_LTR_MAX_NO_SNOOP_LATENCY_VALUE 0x1003<br> /* Latency tolerance reporting, max snoop latency value 3.14ms */<br> #define PCIE_LTR_MAX_SNOOP_LATENCY_VALUE 0x1003<br>+/* PCI-E Sub-System ID */<br>+#define PCIE_SUBSYSTEM_VENDOR_ID 0x94<br> <br> static void pch_pcie_init(struct device *dev)<br> {<br>@@ -69,8 +71,16 @@<br> PCIE_LTR_MAX_SNOOP_LATENCY_VALUE);<br> }<br> <br>+static void pcie_dev_set_subsystem(struct device *dev,<br>+ unsigned vendor, unsigned device)<br>+{<br>+ pci_write_config32(dev, PCIE_SUBSYSTEM_VENDOR_ID,<br>+ ((device & 0xffff) << 16) | (vendor & 0xffff));<br>+}<br>+<br> static struct pci_operations pcie_ops = {<br> .set_L1_ss_latency = pcie_set_L1_ss_max_latency,<br>+ .set_subsystem = pcie_dev_set_subsystem,<br> };<br> <br> static struct device_operations device_ops = {<br>diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c<br>index 708e705..d86f2c8 100644<br>--- a/src/soc/intel/common/block/pmc/pmc.c<br>+++ b/src/soc/intel/common/block/pmc/pmc.c<br>@@ -94,11 +94,16 @@<br> }<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations device_ops = {<br> .read_resources = &pch_pmc_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .init = &pmc_soc_init,<br>+ .ops_pci = &pci_ops,<br> .scan_bus = &scan_lpc_bus,<br> };<br> <br>diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c<br>index f300656..58ba37c 100644<br>--- a/src/soc/intel/common/block/sata/sata.c<br>+++ b/src/soc/intel/common/block/sata/sata.c<br>@@ -58,11 +58,16 @@<br> pci_write_config32(dev, SATA_PCI_CFG_PORT_CTL_STS, temp);<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations sata_ops = {<br> .read_resources = &pci_dev_read_resources,<br> .set_resources = &pci_dev_set_resources,<br>- .enable_resources = &pci_dev_enable_resources,<br>- .final = sata_final,<br>+ .enable_resources = &pci_dev_enable_resources,<br>+ .final = sata_final,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c<br>index d6f4843..9b0532d 100644<br>--- a/src/soc/intel/common/block/scs/sd.c<br>+++ b/src/soc/intel/common/block/scs/sd.c<br>@@ -54,13 +54,18 @@<br> }<br> #endif<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations dev_ops = {<br>- .read_resources = &pci_dev_read_resources,<br>- .set_resources = &pci_dev_set_resources,<br>- .enable_resources = &pci_dev_enable_resources,<br>+ .read_resources = &pci_dev_read_resources,<br>+ .set_resources = &pci_dev_set_resources,<br>+ .enable_resources = &pci_dev_enable_resources,<br> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)<br> .acpi_fill_ssdt_generator = &sd_fill_ssdt,<br> #endif<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c<br>index e526baf..02268aa 100644<br>--- a/src/soc/intel/common/block/smbus/smbus.c<br>+++ b/src/soc/intel/common/block/smbus/smbus.c<br>@@ -77,12 +77,17 @@<br> res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations smbus_ops = {<br> .read_resources = &smbus_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .scan_bus = &scan_smbus,<br> .init = &pch_smbus_init,<br>+ .ops_pci = &pci_ops,<br> .ops_smbus_bus = &lops_smbus_bus,<br> };<br> <br>diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c<br>index 9a34044..725c62b 100644<br>--- a/src/soc/intel/common/block/spi/spi.c<br>+++ b/src/soc/intel/common/block/spi/spi.c<br>@@ -43,12 +43,17 @@<br> .dev_to_bus = &spi_dev_to_bus,<br> };<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations spi_dev_ops = {<br> .read_resources = &pci_dev_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .scan_bus = &scan_generic_bus,<br> .ops_spi_bus = &spi_bus_ops,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c<br>index 05fc5c7..7184c69 100644<br>--- a/src/soc/intel/common/block/sram/sram.c<br>+++ b/src/soc/intel/common/block/sram/sram.c<br>@@ -38,11 +38,16 @@<br> res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static const struct device_operations device_ops = {<br> .read_resources = sram_read_resources,<br> .set_resources = pci_dev_set_resources,<br> .enable_resources = pci_dev_enable_resources,<br> .init = soc_sram_init,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c<br>index 5be9fe1..89705e8 100644<br>--- a/src/soc/intel/common/block/systemagent/systemagent.c<br>+++ b/src/soc/intel/common/block/systemagent/systemagent.c<br>@@ -276,11 +276,16 @@<br> MCHBAR8(MCH_PAIR) = pair;<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations systemagent_ops = {<br> .read_resources = &systemagent_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .init = soc_systemagent_init,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short systemagent_ids[] = {<br>diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c<br>index 7685415..103180b 100644<br>--- a/src/soc/intel/common/block/uart/uart.c<br>+++ b/src/soc/intel/common/block/uart/uart.c<br>@@ -140,10 +140,15 @@<br> }<br> }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations device_ops = {<br> .read_resources = &pch_uart_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &uart_common_enable_resources,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c<br>index 7b74b21..d92575c 100644<br>--- a/src/soc/intel/common/block/xdci/xdci.c<br>+++ b/src/soc/intel/common/block/xdci/xdci.c<br>@@ -22,11 +22,16 @@<br> <br> __attribute__((weak)) void soc_xdci_init(struct device *dev) { /* no-op */ }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations usb_xdci_ops = {<br> .read_resources = &pci_dev_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .init = soc_xdci_init,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br>diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c<br>index ac7bd58..6e85a50 100644<br>--- a/src/soc/intel/common/block/xhci/xhci.c<br>+++ b/src/soc/intel/common/block/xhci/xhci.c<br>@@ -22,11 +22,16 @@<br> <br> __attribute__((weak)) void soc_xhci_init(struct device *dev) { /* no-op */ }<br> <br>+static struct pci_operations pci_ops = {<br>+ .set_subsystem = pci_dev_set_subsystem,<br>+};<br>+<br> static struct device_operations usb_xhci_ops = {<br> .read_resources = &pci_dev_read_resources,<br> .set_resources = &pci_dev_set_resources,<br> .enable_resources = &pci_dev_enable_resources,<br> .init = soc_xhci_init,<br>+ .ops_pci = &pci_ops,<br> };<br> <br> static const unsigned short pci_device_ids[] = {<br></pre><p>To view, visit <a href="https://review.coreboot.org/22768">change 22768</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22768"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I46307b0db78c8864c85865bd0f3328d5141971be </div>
<div style="display:none"> Gerrit-Change-Number: 22768 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>