<p>Julius Werner has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22742">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">libpayload: Minor board ID / RAM code cleanups<br><br>This patch mirrors recent cleanups in coreboot regarding the strapping<br>ID entries in the coreboot table.<br><br>Change-Id: Ia5c3728daf2cb317f8e2bc72c6f1714d6cb4d080<br>Signed-off-by: Julius Werner <jwerner@chromium.org><br>---<br>M payloads/libpayload/include/coreboot_tables.h<br>M payloads/libpayload/include/sysinfo.h<br>M payloads/libpayload/libc/coreboot.c<br>3 files changed, 14 insertions(+), 21 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/22742/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h<br>index 842f206..5bc56d0 100644<br>--- a/payloads/libpayload/include/coreboot_tables.h<br>+++ b/payloads/libpayload/include/coreboot_tables.h<br>@@ -225,14 +225,6 @@<br>        uint64_t cbmem_tab;<br> };<br> <br>-#define CB_TAG_BOARD_ID           0x0025<br>-struct cb_board_id {<br>-        uint32_t tag;<br>-        uint32_t size;<br>-       /* Board ID as retrieved from the board revision GPIOs. */<br>-   uint32_t board_id;<br>-};<br>-<br> #define CB_TAG_X86_ROM_MTRR        0x0021<br> struct cb_x86_rom_mtrr {<br>     uint32_t tag;<br>@@ -244,11 +236,13 @@<br>  uint32_t index;<br> };<br> <br>+<br>+#define CB_TAG_BOARD_ID            0x0025<br> #define CB_TAG_RAM_CODE                0x0028<br>-struct cb_ram_code {<br>+struct cb_strapping_id {<br>      uint32_t tag;<br>         uint32_t size;<br>-       uint32_t ram_code;<br>+   uint32_t id_code;<br> };<br> <br> #define CB_TAG_SPI_FLASH    0x0029<br>diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h<br>index 2e5a837..b46d4b1 100644<br>--- a/payloads/libpayload/include/sysinfo.h<br>+++ b/payloads/libpayload/include/sysinfo.h<br>@@ -108,8 +108,11 @@<br>     void            *cbmem_cons;<br>  void            *mrc_cache;<br>   void            *acpi_gnvs;<br>+<br>+#define UNDEFINED_STRAPPING_ID (~0)<br>  u32             board_id;<br>     u32             ram_code;<br>+<br>  void            *wifi_calibration;<br>    uint64_t        ramoops_buffer;<br>       uint32_t        ramoops_buffer_size;<br>diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c<br>index 10b801c..1efde9a 100644<br>--- a/payloads/libpayload/libc/coreboot.c<br>+++ b/payloads/libpayload/libc/coreboot.c<br>@@ -147,14 +147,14 @@<br> <br> static void cb_parse_board_id(unsigned char *ptr, struct sysinfo_t *info)<br> {<br>-  struct cb_board_id *const cbbid = (struct cb_board_id *)ptr;<br>- info->board_id = cbbid->board_id;<br>+      struct cb_strapping_id *const cbbid = (struct cb_strapping_id *)ptr;<br>+ info->board_id = cbbid->id_code;<br> }<br> <br> static void cb_parse_ram_code(unsigned char *ptr, struct sysinfo_t *info)<br> {<br>-        struct cb_ram_code *const ram_code = (struct cb_ram_code *)ptr;<br>-      info->ram_code = ram_code->ram_code;<br>+   struct cb_strapping_id *const ram_code = (struct cb_strapping_id *)ptr;<br>+      info->ram_code = ram_code->id_code;<br> }<br> <br> #if IS_ENABLED(CONFIG_LP_NVRAM)<br>@@ -277,13 +277,9 @@<br> <br>   info->header = header;<br> <br>- /*<br>-    * Board straps represented by numerical values are small numbers.<br>-    * Preset them to an invalid value in case the firmware does not<br>-      * supply the info.<br>-   */<br>-  info->board_id = ~0;<br>-      info->ram_code = ~0;<br>+      /* Initialize IDs as undefined in case they don't show up in table. */<br>+   info->board_id = UNDEFINED_STRAPPING_ID;<br>+  info->ram_code = UNDEFINED_STRAPPING_ID;<br> <br>        /* Now, walk the tables. */<br>   ptr += header->header_bytes;<br></pre><p>To view, visit <a href="https://review.coreboot.org/22742">change 22742</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22742"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia5c3728daf2cb317f8e2bc72c6f1714d6cb4d080 </div>
<div style="display:none"> Gerrit-Change-Number: 22742 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julius Werner <jwerner@chromium.org> </div>