<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22723">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Move SB index/data pairs to iomap.h<br><br>Relocate the I/O registers to the iomap for PM, PM2, and BIOSRAM.<br><br>Change-Id: I3a59adc974a8a90bfc586188b829a7252356b3cb<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/stoneyridge/include/soc/iomap.h<br>M src/soc/amd/stoneyridge/include/soc/southbridge.h<br>2 files changed, 7 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/22723/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h<br>index 53eb712..d7b94c4 100644<br>--- a/src/soc/amd/stoneyridge/include/soc/iomap.h<br>+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h<br>@@ -45,6 +45,12 @@<br> #define  ACPI_GPE0_BLK         (STONEYRIDGE_ACPI_IO_BASE + 0x10) /* 8 bytes */<br> #define  ACPI_PM_TMR_BLK      (STONEYRIDGE_ACPI_IO_BASE + 0x18) /* 4 bytes */<br> #define SMB_BASE_ADDR                 0xb00<br>+#define PM2_INDEX                       0xcd0<br>+#define PM2_DATA                        0xcd1<br>+#define BIOSRAM_INDEX                   0xcd4<br>+#define BIOSRAM_DATA                    0xcd5<br>+#define PM_INDEX                        0xcd6<br>+#define PM_DATA                         0xcd7<br> #define AB_INDX                         0xcd8<br> #define AB_DATA                         (AB_INDX+4)<br> #define SYS_RESET                 0xcf9<br>diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h<br>index d911472..c7d0dda 100644<br>--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h<br>+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h<br>@@ -30,14 +30,7 @@<br> #define PSP_BAR_ENABLES                        0x48<br> #define  PSP_MAILBOX_BAR_EN              0x10<br> <br>-/* Power management index/data registers */<br>-#define BIOSRAM_INDEX                   0xcd4<br>-#define BIOSRAM_DATA                    0xcd5<br>-#define PM_INDEX                        0xcd6<br>-#define PM_DATA                         0xcd7<br>-#define PM2_INDEX                       0xcd0<br>-#define PM2_DATA                        0xcd1<br>-<br>+/* Power management registers:  0xfed80300 or index/data at IO 0xcd6/cd7 */<br> #define PM_PCI_CTRL                    0x08<br> #define   FORCE_SLPSTATE_RETRY           BIT(25)<br> #define   FORCE_STPCLK_RETRY          BIT(24)<br></pre><p>To view, visit <a href="https://review.coreboot.org/22723">change 22723</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22723"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3a59adc974a8a90bfc586188b829a7252356b3cb </div>
<div style="display:none"> Gerrit-Change-Number: 22723 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>