<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22616">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/apollolake: Make use of Intel common Graphics block<br><br>TEST=Build and boot reef.<br><br>Change-Id: I0edd7454912201598c43e35990e470ec18a32638<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/apollolake/Kconfig<br>M src/soc/intel/apollolake/graphics.c<br>2 files changed, 9 insertions(+), 44 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/22616/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig<br>index f568799..ada9f53 100644<br>--- a/src/soc/intel/apollolake/Kconfig<br>+++ b/src/soc/intel/apollolake/Kconfig<br>@@ -71,6 +71,7 @@<br> select SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES<br> select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG<br> select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY<br>+ select SOC_INTEL_COMMON_BLOCK_GRAPHICS<br> select SOC_INTEL_COMMON_BLOCK_ITSS<br> select SOC_INTEL_COMMON_BLOCK_I2C<br> select SOC_INTEL_COMMON_BLOCK_LPC<br>diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c<br>index 90859d5..d7158cc 100644<br>--- a/src/soc/intel/apollolake/graphics.c<br>+++ b/src/soc/intel/apollolake/graphics.c<br>@@ -1,7 +1,7 @@<br> /*<br> * This file is part of the coreboot project.<br> *<br>- * Copyright (C) 2015-2016 Intel Corp.<br>+ * Copyright (C) 2015-2017 Intel Corp.<br> * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)<br> *<br> * This program is free software; you can redistribute it and/or modify<br>@@ -15,34 +15,21 @@<br> * GNU General Public License for more details.<br> */<br> <br>-#include <arch/acpi.h><br> #include <arch/acpigen.h><br> #include <console/console.h><br> #include <fsp/util.h><br> #include <device/device.h><br> #include <device/pci.h><br>-#include <device/pci_ids.h><br>-#include <soc/pci_devs.h><br>+#include <intelblocks/graphics.h><br> #include <soc/intel/common/opregion.h><br> <br> uintptr_t fsp_soc_get_igd_bar(void)<br> {<br>- device_t dev = SA_DEV_IGD;<br>-<br>- /* Check if IGD PCI device is disabled */<br>- if (!dev->enabled)<br>- return 0;<br>-<br>- return find_resource(dev, PCI_BASE_ADDRESS_2)->base;<br>+ return graphics_get_memory_base();<br> }<br> <br>-static void igd_set_resources(struct device *dev)<br>-{<br>- pci_dev_set_resources(dev);<br>-}<br>-<br>-static unsigned long igd_write_opregion(device_t dev, unsigned long current,<br>- struct acpi_rsdp *rsdp)<br>+uintptr_t graphics_soc_write_acpi_opregion(device_t device,<br>+ uintptr_t current, struct acpi_rsdp *rsdp)<br> {<br> igd_opregion_t *opregion;<br> uint16_t reg16;<br>@@ -77,34 +64,11 @@<br> * Maybe it should move to the finalize handler.<br> */<br> <br>- pci_write_config32(dev, ASLS, (uintptr_t)opregion);<br>- reg16 = pci_read_config16(dev, SWSCI);<br>+ pci_write_config32(device, ASLS, (uintptr_t)opregion);<br>+ reg16 = pci_read_config16(device, SWSCI);<br> reg16 &= ~(1 << 0);<br> reg16 |= (1 << 15);<br>- pci_write_config16(dev, SWSCI, reg16);<br>+ pci_write_config16(device, SWSCI, reg16);<br> <br> return acpi_align_current(current);<br> }<br>-<br>-static const struct device_operations igd_ops = {<br>- .read_resources = pci_dev_read_resources,<br>- .set_resources = igd_set_resources,<br>- .enable_resources = pci_dev_enable_resources,<br>- .init = pci_dev_init,<br>- .write_acpi_tables = igd_write_opregion,<br>- .enable = DEVICE_NOOP<br>-};<br>-<br>-static const unsigned short pci_device_ids[] = {<br>- PCI_DEVICE_ID_INTEL_APL_IGD_HD_505,<br>- PCI_DEVICE_ID_INTEL_APL_IGD_HD_500,<br>- PCI_DEVICE_ID_INTEL_GLK_IGD,<br>- PCI_DEVICE_ID_INTEL_GLK_IGD_EU12,<br>- 0,<br>-};<br>-<br>-static const struct pci_driver integrated_graphics_driver __pci_driver = {<br>- .ops = &igd_ops,<br>- .vendor = PCI_VENDOR_ID_INTEL,<br>- .devices = pci_device_ids,<br>-};<br></pre><p>To view, visit <a href="https://review.coreboot.org/22616">change 22616</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22616"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0edd7454912201598c43e35990e470ec18a32638 </div>
<div style="display:none"> Gerrit-Change-Number: 22616 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>