<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22609">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/skylake: Make use of Intel common DSP block<br><br>TEST=Build and boot soraka/eve.<br><br>Change-Id: I8be2a90dc4e4c5eb196af57045d2a46b7f0c9722<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/include/device/pci_ids.h<br>M src/soc/intel/common/block/dsp/dsp.c<br>M src/soc/intel/skylake/Kconfig<br>M src/soc/intel/skylake/Makefile.inc<br>D src/soc/intel/skylake/dsp.c<br>M src/soc/intel/skylake/include/soc/pci_devs.h<br>6 files changed, 3 insertions(+), 38 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/22609/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h<br>index 0c78fab..9fe7681 100644<br>--- a/src/include/device/pci_ids.h<br>+++ b/src/include/device/pci_ids.h<br>@@ -2905,6 +2905,7 @@<br> #define PCI_DEVICE_ID_INTEL_APL_AUDIO 0x5a98<br> #define PCI_DEVICE_ID_INTEL_GLK_AUDIO 0x3198<br> #define PCI_DEVICE_ID_INTEL_CNL_AUDIO 0x9dc8<br>+#define PCI_DEVICE_ID_INTEL_SKL_AUDIO 0x9d70<br> <br> /* Intel HECI/ME device Ids */<br> #define PCI_DEVICE_ID_INTEL_APL_CSE0 0x5a9a<br>diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c<br>index 06384c7..5b4f932 100644<br>--- a/src/soc/intel/common/block/dsp/dsp.c<br>+++ b/src/soc/intel/common/block/dsp/dsp.c<br>@@ -29,6 +29,7 @@<br> PCI_DEVICE_ID_INTEL_APL_AUDIO,<br> PCI_DEVICE_ID_INTEL_CNL_AUDIO,<br> PCI_DEVICE_ID_INTEL_GLK_AUDIO,<br>+ PCI_DEVICE_ID_INTEL_SKL_AUDIO,<br> 0,<br> };<br> <br>diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig<br>index e5cc4f7..053239a 100644<br>--- a/src/soc/intel/skylake/Kconfig<br>+++ b/src/soc/intel/skylake/Kconfig<br>@@ -55,6 +55,7 @@<br> select SOC_INTEL_COMMON_BLOCK_CPU<br> select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT<br> select SOC_INTEL_COMMON_BLOCK_CSE<br>+ select SOC_INTEL_COMMON_BLOCK_DSP<br> select SOC_INTEL_COMMON_BLOCK_EBDA<br> select SOC_INTEL_COMMON_BLOCK_FAST_SPI<br> select SOC_INTEL_COMMON_BLOCK_GPIO<br>diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc<br>index da45ec5..3a6dd2d 100644<br>--- a/src/soc/intel/skylake/Makefile.inc<br>+++ b/src/soc/intel/skylake/Makefile.inc<br>@@ -46,7 +46,6 @@<br> ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += chip.c<br> ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += chip_fsp20.c<br> ramstage-y += cpu.c<br>-ramstage-y += dsp.c<br> ramstage-y += elog.c<br> ramstage-y += finalize.c<br> ramstage-y += gpio.c<br>diff --git a/src/soc/intel/skylake/dsp.c b/src/soc/intel/skylake/dsp.c<br>deleted file mode 100644<br>index 13051a0..0000000<br>--- a/src/soc/intel/skylake/dsp.c<br>+++ /dev/null<br>@@ -1,33 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright 2016 Google Inc.<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-#include <device/device.h><br>-#include <device/pci.h><br>-#include <device/pci_ids.h><br>-#include <soc/ramstage.h><br>-<br>-static struct device_operations dsp_dev_ops = {<br>- .read_resources = &pci_dev_read_resources,<br>- .set_resources = &pci_dev_set_resources,<br>- .enable_resources = &pci_dev_enable_resources,<br>- .scan_bus = &scan_static_bus,<br>- .ops_pci = &soc_pci_ops,<br>-};<br>-<br>-static const struct pci_driver skylake_dsp __pci_driver = {<br>- .ops = &dsp_dev_ops,<br>- .vendor = PCI_VENDOR_ID_INTEL,<br>- .device = 0x9d70<br>-};<br>diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h<br>index 28f2f39..4fc8807 100644<br>--- a/src/soc/intel/skylake/include/soc/pci_devs.h<br>+++ b/src/soc/intel/skylake/include/soc/pci_devs.h<br>@@ -44,10 +44,6 @@<br> #define SA_DEVFN_IGD _SA_DEVFN(IGD)<br> #define SA_DEV_IGD _SA_DEV(IGD)<br> <br>-#define SA_DEV_SLOT_DSP 0x04<br>-#define SA_DEVFN_DSP _SA_DEVFN(DSP)<br>-#define SA_DEV_DSP _SA_DEV(DSP)<br>-<br> /* PCH Devices */<br> <br> #define PCH_DEV_SLOT_ISH 0x13<br></pre><p>To view, visit <a href="https://review.coreboot.org/22609">change 22609</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22609"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I8be2a90dc4e4c5eb196af57045d2a46b7f0c9722 </div>
<div style="display:none"> Gerrit-Change-Number: 22609 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>