<p>V Sowmya has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22608">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/{APL,GLK}: Use Intel SRAM common code.<br><br>Change-Id: If9f5d400df09b4a0aa4b464d7f1f24320696b0aa<br>Signed-off-by: V Sowmya <v.sowmya@intel.com><br>---<br>M src/soc/intel/apollolake/Kconfig<br>M src/soc/intel/apollolake/Makefile.inc<br>D src/soc/intel/apollolake/sram.c<br>3 files changed, 1 insertion(+), 74 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/22608/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig<br>index f568799..b21354e 100644<br>--- a/src/soc/intel/apollolake/Kconfig<br>+++ b/src/soc/intel/apollolake/Kconfig<br>@@ -88,6 +88,7 @@<br> select SOC_INTEL_COMMON_BLOCK_SMM<br> select SOC_INTEL_COMMON_BLOCK_SPI<br> select SOC_INTEL_COMMON_SPI_FLASH_PROTECT<br>+ select SOC_INTEL_COMMON_BLOCK_SRAM<br> select UDELAY_TSC<br> select TSC_CONSTANT_RATE<br> select TSC_MONOTONIC_TIMER<br>diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc<br>index 14932dd..5fc07ae 100644<br>--- a/src/soc/intel/apollolake/Makefile.inc<br>+++ b/src/soc/intel/apollolake/Makefile.inc<br>@@ -62,7 +62,6 @@<br> ramstage-y += pmutil.c<br> ramstage-y += pmc.c<br> ramstage-y += reset.c<br>-ramstage-y += sram.c<br> ramstage-y += xdci.c<br> ramstage-y += sd.c<br> <br>diff --git a/src/soc/intel/apollolake/sram.c b/src/soc/intel/apollolake/sram.c<br>deleted file mode 100644<br>index 70e1330..0000000<br>--- a/src/soc/intel/apollolake/sram.c<br>+++ /dev/null<br>@@ -1,73 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2016 Intel Corp.<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; either version 2 of the License, or<br>- * (at your option) any later version.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-#include <device/device.h><br>-#include <device/pci.h><br>-#include <device/pci_ids.h><br>-#include <soc/pci_devs.h><br>-#include <soc/iomap.h><br>-<br>-static void read_resources(device_t dev)<br>-{<br>- struct resource *res;<br>- pci_dev_read_resources(dev);<br>-<br>- res = new_resource(dev, PCI_BASE_ADDRESS_0);<br>- res->base = SRAM_BASE_0;<br>- res->size = SRAM_SIZE_0;<br>- res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;<br>-<br>- res = new_resource(dev, PCI_BASE_ADDRESS_2);<br>- res->base = SRAM_BASE_2;<br>- res->size = SRAM_SIZE_2;<br>- res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;<br>-}<br>-<br>-static void set_resources(device_t dev)<br>-{<br>- struct resource *res;<br>- pci_dev_set_resources(dev);<br>-<br>- res = find_resource(dev, PCI_BASE_ADDRESS_0);<br>- pci_write_config32(dev, res->index, res->base);<br>- dev->command |= PCI_COMMAND_MEMORY;<br>- res->flags |= IORESOURCE_STORED;<br>- report_resource_stored(dev, res, " SRAM BAR 0");<br>-<br>- res = find_resource(dev, PCI_BASE_ADDRESS_2);<br>- pci_write_config32(dev, res->index, res->base);<br>- dev->command |= PCI_COMMAND_MEMORY;<br>- res->flags |= IORESOURCE_STORED;<br>- report_resource_stored(dev, res, " SRAM BAR 2");<br>-}<br>-<br>-static const struct device_operations device_ops = {<br>- .read_resources = read_resources,<br>- .set_resources = set_resources,<br>- .enable_resources = pci_dev_enable_resources,<br>-};<br>-<br>-static const unsigned short pci_device_ids[] = {<br>- PCI_DEVICE_ID_INTEL_APL_SRAM,<br>- PCI_DEVICE_ID_INTEL_GLK_SRAM,<br>- 0,<br>-};<br>-<br>-static const struct pci_driver pmc __pci_driver = {<br>- .ops = &device_ops,<br>- .vendor = PCI_VENDOR_ID_INTEL,<br>- .devices= pci_device_ids,<br>-};<br></pre><p>To view, visit <a href="https://review.coreboot.org/22608">change 22608</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22608"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: If9f5d400df09b4a0aa4b464d7f1f24320696b0aa </div>
<div style="display:none"> Gerrit-Change-Number: 22608 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: V Sowmya <v.sowmya@intel.com> </div>