<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22574">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge/lpc.c: Use new wide IO functions<br><br>Use the new wide IO functions from southbridge.c to simplify code in<br>functions set_child_resource and lpc_enable_childrens_resources.<br><br>BUG=b:64033893<br><br>Change-Id: I8533e8ff766df8a8261298559aace7666487826d<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/lpc.c<br>1 file changed, 24 insertions(+), 95 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/22574/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/stoneyridge/lpc.c b/src/soc/amd/stoneyridge/lpc.c<br>index 3cd9acb..5450469 100644<br>--- a/src/soc/amd/stoneyridge/lpc.c<br>+++ b/src/soc/amd/stoneyridge/lpc.c<br>@@ -158,39 +158,14 @@<br> pci_dev_set_resources(dev);<br> }<br> <br>-/*<br>- * Structure to simplify code obtaining the total of used wide IO<br>- * registers and the size assigned to each. Used on set_child_resource<br>- * and lpc_enable_childrens_resources.<br>- */<br>-struct _wide_IO_enable_bits {<br>- u32 enable[3];<br>- u8 alt[3];<br>-} wio_en = {<br>- {<br>- LPC_WIDEIO0_ENABLE,<br>- LPC_WIDEIO1_ENABLE,<br>- LPC_WIDEIO2_ENABLE<br>- },<br>- {<br>- LPC_ALT_WIDEIO0_ENABLE,<br>- LPC_ALT_WIDEIO1_ENABLE,<br>- LPC_ALT_WIDEIO2_ENABLE<br>- }<br>-};<br>-<br> static void set_child_resource(device_t child,<br>- int *wio_total_ptr,<br>- u16 *reg_var,<br> u32 *reg,<br>- u32 *reg_x,<br>- u8 *wiosize)<br>+ u32 *reg_x)<br> {<br> struct resource *res;<br> u32 base, end;<br> u32 rsize = 0, set = 0, set_x = 0;<br>- int i, wio_total = *wio_total_ptr;<br>- u16 reg_size[3];<br>+ uint8_t function_ret;<br> <br> /*<br> * Be a bit relaxed, tolerate that LPC region might be bigger than<br>@@ -202,17 +177,6 @@<br> * will verify if required region was previously set and will avoid<br> * setting a new wide IO resource if one is already set.<br> */<br>-<br>- /*<br>- * For each wideIO get the current size, 16, 512,<br>- * or 0 if it isn't used.<br>- */<br>- for (i = 0; i < 3; i++) {<br>- if (i < wio_total) /* convert to index */<br>- reg_size[i] = (*wiosize & wio_en.alt[i]) ? 16 : 512;<br>- else<br>- reg_size[i] = 0;<br>- }<br> <br> for (res = child->resource_list; res; res = res->next) {<br> if (!(res->flags & IORESOURCE_IO))<br>@@ -289,18 +253,11 @@<br> break;<br> default:<br> rsize = 0;<br>- if (wio_total > 0) {<br>- for (i = 0; i < wio_total; i++) {<br>- if ((base >= reg_var[i]) &&<br>- ((base + res->size) <=<br>- (reg_var[i] + reg_size[i]))) {<br>- rsize = reg_size[i];<br>- printk(BIOS_DEBUG,<br>- "Covered by wideIO");<br>- printk(BIOS_DEBUG, " %d\n", i);<br>- break;<br>- }<br>- }<br>+ function_ret = sb_find_wideio_range(base, end);<br>+ if (function_ret != WIDE_IO_RANGE_FAILED) {<br>+ rsize = sb_wideio_size(function_ret);<br>+ printk(BIOS_DEBUG, "Covered by wideIO");<br>+ printk(BIOS_DEBUG, " %d\n", function_ret);<br> }<br> }<br> /* check if region found and matches the enable */<br>@@ -308,18 +265,23 @@<br> *reg |= set;<br> *reg_x |= set_x;<br> /* check if we can fit resource in variable range */<br>- } else if ((wio_total < 3) && (res->size <= 512)) {<br>- reg_var[wio_total] = base;<br>- *reg_x |= wio_en.enable[i];<br>- if (res->size <= 16)<br>- *wiosize |= wio_en.alt[wio_total];<br>- wio_total++;<br>- *wio_total_ptr = wio_total;<br> } else {<br>- printk(BIOS_ERR,<br>- "cannot fit LPC decode region:");<br>- printk(BIOS_ERR, "%s, base = 0x%08x, end = 0x%08x\n",<br>- dev_path(child), base, end);<br>+ function_ret = sb_set_wideio_range(base, res->size);<br>+ if (function_ret != WIDE_IO_RANGE_FAILED) {<br>+ /* preserve wide IO related bits. */<br>+ *reg_x = pci_read_config32(SOC_LPC_DEV,<br>+ LPC_IO_OR_MEM_DECODE_ENABLE);<br>+<br>+ printk(BIOS_DEBUG,<br>+ "Range assigned to wide IO %d\n",<br>+ function_ret);<br>+ } else {<br>+ printk(BIOS_ERR,<br>+ "cannot fit LPC decode region:");<br>+ printk(BIOS_ERR,<br>+ "%s, base = 0x%08x, end = 0x%08x\n",<br>+ dev_path(child), base, end);<br>+ }<br> }<br> }<br> }<br>@@ -334,27 +296,10 @@<br> {<br> struct bus *link;<br> u32 reg, reg_x;<br>- int i, wio_total = 0;<br>- u16 reg_var[3];<br>- u8 wiosize = pci_read_config8(dev, LPC_ALT_WIDEIO_RANGE_ENABLE);<br> <br> reg = pci_read_config32(dev, LPC_IO_PORT_DECODE_ENABLE);<br> reg_x = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE);<br> <br>- /*<br>- * Detect the number of used ranges (wide IO), and don't use those<br>- * already taken.<br>- */<br>- for (i = 0; i < 3; i++) {<br>- if (reg_x & wio_en.enable[i])<br>- wio_total = i + 1;<br>- }<br>-<br>- reg_var[2] = pci_read_config16(dev, LPC_WIDEIO2_GENERIC_PORT);<br>- reg_var[1] = pci_read_config16(dev, LPC_WIDEIO1_GENERIC_PORT);<br>- reg_var[0] = pci_read_config16(dev, LPC_WIDEIO_GENERIC_PORT);<br>-<br>- /* todo: clean up the code style here */<br> for (link = dev->link_list; link; link = link->next) {<br> device_t child;<br> for (child = link->children; child;<br>@@ -362,29 +307,13 @@<br> if (child->enabled<br> && (child->path.type == DEVICE_PATH_PNP)) {<br> set_child_resource(child,<br>- &wio_total,<br>- reg_var,<br> ®,<br>- ®_x,<br>- &wiosize);<br>+ ®_x);<br> }<br> }<br> }<br> pci_write_config32(dev, LPC_IO_PORT_DECODE_ENABLE, reg);<br> pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, reg_x);<br>- /* Set WideIO for as many IOs found (fall through is on purpose) */<br>- switch (wio_total) {<br>- case 3:<br>- pci_write_config16(dev, LPC_WIDEIO2_GENERIC_PORT, reg_var[2]);<br>- /* fall through */<br>- case 2:<br>- pci_write_config16(dev, LPC_WIDEIO1_GENERIC_PORT, reg_var[1]);<br>- /* fall through */<br>- case 1:<br>- pci_write_config16(dev, LPC_WIDEIO_GENERIC_PORT, reg_var[0]);<br>- break;<br>- }<br>- pci_write_config8(dev, LPC_ALT_WIDEIO_RANGE_ENABLE, wiosize);<br> }<br> <br> static void lpc_enable_resources(device_t dev)<br></pre><p>To view, visit <a href="https://review.coreboot.org/22574">change 22574</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22574"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I8533e8ff766df8a8261298559aace7666487826d </div>
<div style="display:none"> Gerrit-Change-Number: 22574 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>