<p>Matt DeVillier has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22524">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/skylake: add acoustic noise mitigation params for FSP 1.1<br><br>Adapted from Chromium commit d6655eb<br>[Skylake: create UPD Interface for acoustic noise tuning]<br><br>Add FSP 1.1 params needed for acoustic mitigation on google/caroline<br>(to be upstreamed in a subsequent commit).<br><br>TEST: build/boot google/caroline<br><br>Change-Id: Ifb36ecef8c1735c63a5322d952929e9c34cddfb9<br>Signed-off-by: Matt DeVillier <matt.devillier@gmail.com><br>---<br>M src/soc/intel/skylake/chip.c<br>M src/soc/intel/skylake/chip.h<br>M src/vendorcode/intel/fsp/fsp1_1/skylake/FspUpdVpd.h<br>3 files changed, 48 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/22524/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c<br>index dfa813a..f5596d2 100644<br>--- a/src/soc/intel/skylake/chip.c<br>+++ b/src/soc/intel/skylake/chip.c<br>@@ -203,6 +203,13 @@<br> <br> params->SendVrMbxCmd = config->SendVrMbxCmd;<br> <br>+ /* Acoustic Noise Mitigation */<br>+ params->AcousticNoiseMitigation = config->AcousticNoiseMitigation;<br>+ params->SlowSlewRateForIa = config->SlowSlewRateForIa;<br>+ params->SlowSlewRateForGt = config->SlowSlewRateForGt;<br>+ params->SlowSlewRateForSa = config->SlowSlewRateForSa;<br>+ params->FastPkgCRampDisable = config->FastPkgCRampDisable;<br>+<br> soc_irq_settings(params);<br> }<br> <br>@@ -808,6 +815,21 @@<br> fsp_display_upd_value("SendVrMbxCmd", 1,<br> original->SendVrMbxCmd,<br> params->SendVrMbxCmd);<br>+ fsp_display_upd_value("AcousticNoiseMitigation", 1,<br>+ original->AcousticNoiseMitigation,<br>+ params->AcousticNoiseMitigation);<br>+ fsp_display_upd_value("SlowSlewRateForIa", 1,<br>+ original->SlowSlewRateForIa,<br>+ params->SlowSlewRateForIa);<br>+ fsp_display_upd_value("SlowSlewRateForGt", 1,<br>+ original->SlowSlewRateForGt,<br>+ params->SlowSlewRateForGt);<br>+ fsp_display_upd_value("SlowSlewRateForSa", 1,<br>+ original->SlowSlewRateForSa,<br>+ params->SlowSlewRateForSa);<br>+ fsp_display_upd_value("FastPkgCRampDisable", 1,<br>+ original->FastPkgCRampDisable,<br>+ params->FastPkgCRampDisable);<br> }<br> <br> static void pci_set_subsystem(device_t dev, unsigned int vendor,<br>diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h<br>index 2c282bc..fef4a7f 100644<br>--- a/src/soc/intel/skylake/chip.h<br>+++ b/src/soc/intel/skylake/chip.h<br>@@ -485,6 +485,9 @@<br> * 0b - Enabled<br> * 1b - Disabled<br> */<br>+ /* FSP 1.1 */<br>+ u8 FastPkgCRampDisable;<br>+ /* FSP 2.0 */<br> u8 FastPkgCRampDisableIa;<br> u8 FastPkgCRampDisableGt;<br> u8 FastPkgCRampDisableSa;<br>diff --git a/src/vendorcode/intel/fsp/fsp1_1/skylake/FspUpdVpd.h b/src/vendorcode/intel/fsp/fsp1_1/skylake/FspUpdVpd.h<br>index 45f2099..32b926a 100644<br>--- a/src/vendorcode/intel/fsp/fsp1_1/skylake/FspUpdVpd.h<br>+++ b/src/vendorcode/intel/fsp/fsp1_1/skylake/FspUpdVpd.h<br>@@ -1,6 +1,6 @@<br> /** @file<br> <br>-Copyright (c) 2016, Intel Corporation. All rights reserved.<BR><br>+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR><br> <br> Redistribution and use in source and binary forms, with or without modification,<br> are permitted provided that the following conditions are met:<br>@@ -950,14 +950,34 @@<br> UINT8 Early8254ClockGatingEnable;<br> <br> /** Offset 0x03E5 - Enable VR specific mailbox command<br>- When set, an extra VR mailbox command specifically for the MPS IMPV8 VR will be sent. This for FSP only. 0 - Don't Send, 1 - Send<br>+ VR specific mailbox commands, 000b: no VR specific command sent, 001b: A VR mailbox command specifically for the MPS IMPV8 VR will be sent, 010b: VR specific command sent for PS4 exit issue, 011b: VR specific command sent for both MPS IMPV8 & PS4 exit issue.<br> $EN_DIS<br> **/<br> UINT8 SendVrMbxCmd;<br> <br> /** Offset 0x03E6<br> **/<br>- UINT8 ReservedSiliconInitUpd[20];<br>+ UINT8 AcousticNoiseMitigation;<br>+<br>+/** Offset 0x03E7<br>+**/<br>+ UINT8 SlowSlewRateForIa;<br>+<br>+/** Offset 0x03E8<br>+**/<br>+ UINT8 SlowSlewRateForGt;<br>+<br>+/** Offset 0x03E9<br>+**/<br>+ UINT8 SlowSlewRateForSa;<br>+<br>+/** Offset 0x03EA<br>+**/<br>+ UINT8 FastPkgCRampDisable;<br>+<br>+/** Offset 0x03EB<br>+**/<br>+ UINT8 ReservedSiliconInitUpd[15];<br> } SILICON_INIT_UPD;<br> <br> #define FSP_UPD_SIGNATURE 0x244450554C4B5324 /* '$SKLUPD$' */<br></pre><p>To view, visit <a href="https://review.coreboot.org/22524">change 22524</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22524"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ifb36ecef8c1735c63a5322d952929e9c34cddfb9 </div>
<div style="display:none"> Gerrit-Change-Number: 22524 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Matt DeVillier <matt.devillier@gmail.com> </div>