<p>Marc Jones has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22483">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Fix SPD files and functions camel case<br><br>Remove ugly camel case in the soc/amd/common and Stoney Ridge<br>SPD files and functions. Update the related mainboards.<br><br>Also, remove a unreferenced function prototype, smbus_readSpd().<br><br>Change-Id: I51045b6621f0708d61a570acbdcb4e6522baa1ea<br>Signed-off-by: Marc Jones <marcj303@gmail.com><br>---<br>M src/mainboard/amd/gardenia/devicetree.cb<br>M src/mainboard/google/kahlee/variants/kahlee/devicetree.cb<br>R src/soc/amd/common/block/include/amdblocks/dimm_spd.h<br>M src/soc/amd/stoneyridge/BiosCallOuts.c<br>M src/soc/amd/stoneyridge/Makefile.inc<br>M src/soc/amd/stoneyridge/chip.h<br>R src/soc/amd/stoneyridge/dimm_spd.c<br>M src/soc/amd/stoneyridge/smbus_spd.c<br>8 files changed, 23 insertions(+), 24 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/22483/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/amd/gardenia/devicetree.cb b/src/mainboard/amd/gardenia/devicetree.cb<br>index 38bf86f..e9946ad 100644<br>--- a/src/mainboard/amd/gardenia/devicetree.cb<br>+++ b/src/mainboard/amd/gardenia/devicetree.cb<br>@@ -14,7 +14,7 @@<br> #<br> chip soc/amd/stoneyridge<br> <br>- register "spdAddrLookup" = "<br>+ register "spd_addr_lookup" = "<br> {<br> { {0xA2, 0x00} }, // socket 0 - Channel 0, slots 0 & 1<br> }"<br>diff --git a/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb b/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb<br>index 28f22a4..409e09e 100644<br>--- a/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb<br>+++ b/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb<br>@@ -14,7 +14,7 @@<br> #<br> chip soc/amd/stoneyridge<br> <br>- register "spdAddrLookup" = "<br>+ register "spd_addr_lookup" = "<br> {<br> { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0<br> }"<br>diff --git a/src/soc/amd/common/dimmSpd.h b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h<br>similarity index 79%<br>rename from src/soc/amd/common/dimmSpd.h<br>rename to src/soc/amd/common/block/include/amdblocks/dimm_spd.h<br>index 9abdb98..8683caa 100644<br>--- a/src/soc/amd/common/dimmSpd.h<br>+++ b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h<br>@@ -1,7 +1,7 @@<br> /*<br> * This file is part of the coreboot project.<br> *<br>- * Copyright (C) 2012 Advanced Micro Devices, Inc.<br>+ * Copyright (C) 2012, 2017 Advanced Micro Devices, Inc.<br> *<br> * This program is free software; you can redistribute it and/or modify<br> * it under the terms of the GNU General Public License as published by<br>@@ -20,7 +20,6 @@<br> AmdMemoryReadSPD(IN UINT32 Func, IN UINTN Data,<br> IN OUT AGESA_READ_SPD_PARAMS *SpdData);<br> <br>-int sb_readSpd(uint8_t spdAddress, char *buf, size_t len);<br>-int smbus_readSpd(int spdAddress, char *buf, size_t len);<br>+int sb_read_spd(uint8_t spdAddress, char *buf, size_t len);<br> <br> #endif<br>diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c<br>index 9110338..2c68f38 100644<br>--- a/src/soc/amd/stoneyridge/BiosCallOuts.c<br>+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c<br>@@ -21,7 +21,7 @@<br> <br> #include <agesawrapper.h><br> #include <amdlib.h><br>-#include <dimmSpd.h><br>+#include <amdblocks/dimm_spd.h><br> <br> AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)<br> {<br>diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc<br>index 197145a..8b1c648 100644<br>--- a/src/soc/amd/stoneyridge/Makefile.inc<br>+++ b/src/soc/amd/stoneyridge/Makefile.inc<br>@@ -47,7 +47,7 @@<br> romstage-y += BiosCallOuts.c<br> romstage-y += romstage.c<br> romstage-y += early_setup.c<br>-romstage-y += dimmSpd.c<br>+romstage-y += dimm_spd.c<br> romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c<br> romstage-y += gpio.c<br> romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c<br>diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h<br>index f50851b..5688a73 100644<br>--- a/src/soc/amd/stoneyridge/chip.h<br>+++ b/src/soc/amd/stoneyridge/chip.h<br>@@ -25,7 +25,7 @@<br> #define MAX_DIMMS_PER_CH 2<br> <br> struct soc_amd_stoneyridge_config {<br>- u8 spdAddrLookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH];<br>+ u8 spd_addr_lookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH];<br> enum {<br> DRAM_CONTENTS_KEEP,<br> DRAM_CONTENTS_CLEAR<br>diff --git a/src/soc/amd/stoneyridge/dimmSpd.c b/src/soc/amd/stoneyridge/dimm_spd.c<br>similarity index 73%<br>rename from src/soc/amd/stoneyridge/dimmSpd.c<br>rename to src/soc/amd/stoneyridge/dimm_spd.c<br>index 163779d..13fd72f 100644<br>--- a/src/soc/amd/stoneyridge/dimmSpd.c<br>+++ b/src/soc/amd/stoneyridge/dimm_spd.c<br>@@ -1,7 +1,7 @@<br> /*<br> * This file is part of the coreboot project.<br> *<br>- * Copyright (C) 2015 - 2016 Advanced Micro Devices, Inc.<br>+ * Copyright (C) 2015 - 2017 Advanced Micro Devices, Inc.<br> *<br> * This program is free software; you can redistribute it and/or modify<br> * it under the terms of the GNU General Public License as published by<br>@@ -19,28 +19,28 @@<br> #include <soc/pci_devs.h><br> #include <stdlib.h><br> #include "chip.h"<br>-#include <dimmSpd.h><br>+#include <amdblocks/dimm_spd.h><br> <br> AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2,<br> AGESA_READ_SPD_PARAMS *info)<br> {<br>- uint8_t spdAddress;<br>+ uint8_t spd_address;<br> DEVTREE_CONST struct device *dev = dev_find_slot(0, DCT_DEVFN);<br> DEVTREE_CONST struct soc_amd_stoneyridge_config *conf = dev->chip_info;<br> <br> if ((dev == 0) || (conf == 0))<br> return AGESA_ERROR;<br>- if (info->SocketId >= ARRAY_SIZE(conf->spdAddrLookup))<br>+ if (info->SocketId >= ARRAY_SIZE(conf->spd_addr_lookup))<br> return AGESA_ERROR;<br>- if (info->MemChannelId >= ARRAY_SIZE(conf->spdAddrLookup[0]))<br>+ if (info->MemChannelId >= ARRAY_SIZE(conf->spd_addr_lookup[0]))<br> return AGESA_ERROR;<br>- if (info->DimmId >= ARRAY_SIZE(conf->spdAddrLookup[0][0]))<br>+ if (info->DimmId >= ARRAY_SIZE(conf->spd_addr_lookup[0][0]))<br> return AGESA_ERROR;<br>- spdAddress = conf->spdAddrLookup<br>+ spd_address = conf->spd_addr_lookup<br> [info->SocketId][info->MemChannelId][info->DimmId];<br>- if (spdAddress == 0)<br>+ if (spd_address == 0)<br> return AGESA_ERROR;<br>- int err = sb_readSpd(spdAddress, (void *)info->Buffer, 128);<br>+ int err = sb_read_spd(spd_address, (void *)info->Buffer, 128);<br> if (err)<br> return AGESA_ERROR;<br> return AGESA_SUCCESS;<br>diff --git a/src/soc/amd/stoneyridge/smbus_spd.c b/src/soc/amd/stoneyridge/smbus_spd.c<br>index f5c77c9..acd907e 100644<br>--- a/src/soc/amd/stoneyridge/smbus_spd.c<br>+++ b/src/soc/amd/stoneyridge/smbus_spd.c<br>@@ -1,7 +1,7 @@<br> /*<br> * This file is part of the coreboot project.<br> *<br>- * Copyright (C) 2012 Advanced Micro Devices, Inc.<br>+ * Copyright (C) 2012, 2017 Advanced Micro Devices, Inc.<br> *<br> * This program is free software; you can redistribute it and/or modify<br> * it under the terms of the GNU General Public License as published by<br>@@ -18,7 +18,7 @@<br> #include <device/device.h><br> #include <soc/southbridge.h><br> #include <soc/smbus.h><br>-#include <dimmSpd.h><br>+#include <amdblocks/dimm_spd.h><br> <br> /*<br> * readspd - Read one or more SPD bytes from a DIMM.<br>@@ -72,24 +72,24 @@<br> return 0;<br> }<br> <br>-static void writePmReg(int reg, int data)<br>+static void write_pm_reg(int reg, int data)<br> {<br> outb(reg, PM_INDEX);<br> outb(data, PM_DATA);<br> }<br> <br>-static void setupFch(uint16_t ioBase)<br>+static void setup_fch(uint16_t ioBase)<br> {<br>- writePmReg(SMB_ASF_IO_BASE, ioBase >> 8);<br>+ write_pm_reg(SMB_ASF_IO_BASE, ioBase >> 8);<br> outb(SMB_SPEED_400KHZ, ioBase + SMBTIMING);<br> /* Clear all SMBUS status bits */<br> outb(SMBHST_STAT_CLEAR, ioBase + SMBHSTSTAT);<br> outb(SMBSLV_STAT_CLEAR, ioBase + SMBSLVSTAT);<br> }<br> <br>-int sb_readSpd(uint8_t spdAddress, char *buf, size_t len)<br>+int sb_read_spd(uint8_t spdAddress, char *buf, size_t len)<br> {<br> uint16_t ioBase = SMB_BASE_ADDR;<br>- setupFch(ioBase);<br>+ setup_fch(ioBase);<br> return readspd(ioBase, spdAddress, buf, len);<br> }<br></pre><p>To view, visit <a href="https://review.coreboot.org/22483">change 22483</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22483"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I51045b6621f0708d61a570acbdcb4e6522baa1ea </div>
<div style="display:none"> Gerrit-Change-Number: 22483 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marc Jones <marc@marcjonesconsulting.com> </div>