<p>Marc Jones has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22486">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/kahlee/variant/grunt: Add SPD function<br><br>Grunt has soldered down memory and stores the SPD in cbfs.<br><br>BUG=b:67845441<br><br>Change-Id: I789002bfadc1a2b24f9046708986d29c0e2daf33<br>Signed-off-by: Marc Jones <marcj303@gmail.com><br>---<br>M src/mainboard/google/kahlee/Kconfig<br>A src/mainboard/google/kahlee/variants/grunt/Makefile.inc<br>A src/mainboard/google/kahlee/variants/grunt/gpio.c<br>A src/mainboard/google/kahlee/variants/grunt/memory.c<br>A src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc<br>A src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex<br>6 files changed, 287 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/22486/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig<br>index 7173f1d..6fe6f11 100644<br>--- a/src/mainboard/google/kahlee/Kconfig<br>+++ b/src/mainboard/google/kahlee/Kconfig<br>@@ -22,6 +22,7 @@<br> select EC_GOOGLE_CHROMEEC_LPC<br> select HAVE_OPTION_TABLE<br> select HAVE_ACPI_TABLES<br>+ select GENERIC_SPD_BIN<br> select GFXUMA<br> select GOOGLE_SMBIOS_MAINBOARD_VERSION<br> select MAINBOARD_HAS_CHROMEOS<br>diff --git a/src/mainboard/google/kahlee/variants/grunt/Makefile.inc b/src/mainboard/google/kahlee/variants/grunt/Makefile.inc<br>new file mode 100644<br>index 0000000..36a8c4f<br>--- /dev/null<br>+++ b/src/mainboard/google/kahlee/variants/grunt/Makefile.inc<br>@@ -0,0 +1,20 @@<br>+#<br>+# This file is part of the coreboot project.<br>+#<br>+# Copyright (C) 2017 Google, Inc.<br>+#<br>+# This program is free software; you can redistribute it and/or modify<br>+# it under the terms of the GNU General Public License as published by<br>+# the Free Software Foundation; version 2 of the License.<br>+#<br>+# This program is distributed in the hope that it will be useful,<br>+# but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+# GNU General Public License for more details.<br>+#<br>+<br>+subdirs-y += spd<br>+<br>+romstage-y += memory.c<br>+<br>+ramstage-y += memory.c<br>diff --git a/src/mainboard/google/kahlee/variants/grunt/gpio.c b/src/mainboard/google/kahlee/variants/grunt/gpio.c<br>new file mode 100644<br>index 0000000..d90a99c<br>--- /dev/null<br>+++ b/src/mainboard/google/kahlee/variants/grunt/gpio.c<br>@@ -0,0 +1,150 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * Copyright (C) 2017 Advanced Micro Devices, Inc.<br>+ *<br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation; version 2 of the License.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+#include <agesawrapper.h><br>+#include <baseboard/variants.h><br>+#include <soc/smi.h><br>+#include <soc/southbridge.h><br>+#include <stdlib.h><br>+#include <variant/gpio.h><br>+<br>+static const GPIO_CONTROL agesa_board_gpios[] = {<br>+ /* AGPIO2 PCIE/WLAN WAKE# SCI*/<br>+ {2, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* SER TX */<br>+ {8, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+ /* SER RX */<br>+ {9, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* AGPIO 12 */<br>+ {12, Function2, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* TS_EN_SOC (TouchScreen enable GPIO) */<br>+ {13, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* CAM_PWRON (Camera enable GPIO) */<br>+ {14, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* EC_IN_RW */<br>+ {15, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* APU_I2C_3_SCL */<br>+ {19, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* APU_I2C_3_SDA */<br>+ {20, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* AGPIO22 EC_SCI */<br>+ {22, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* APU_BT_ON# */<br>+ {24, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* DEVSLP1_SSD */<br>+ {67, Function1, FCH_GPIO_PULL_UP_ENABLE},<br>+<br>+ /* DEVSLP1_EMMC */<br>+ /* No Connect for now.<br>+ * {70, Function1, FCH_GPIO_PULL_UP_ENABLE},<br>+ */<br>+<br>+ /* SPI_TPM_CS_L */<br>+ {76, Function1, FCH_GPIO_PULL_DOWN_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* CAM_LED# */<br>+ {84, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* TS_RST# (TouchScreen Reset) */<br>+ {85, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* WLAN_RST#_AUX */<br>+ {119, Function2, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE<br>+ | FCH_GPIO_OUTPUT_ENABLE},<br>+<br>+ /* BD_ID1 */<br>+ {135, Function1, 0 },<br>+<br>+ /* TPM_SERIRQ# */<br>+ {139, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* BD_ID2 */<br>+ {140, Function1, 0 },<br>+<br>+ /* APU_SPI_WP */<br>+ {142, Function1, FCH_GPIO_PULL_UP_ENABLE },<br>+<br>+ /* BD_ID3 */<br>+ {144, Function1, 0 },<br>+<br>+ {-1}<br>+};<br>+<br>+const GPIO_CONTROL *get_gpio_table(void)<br>+{<br>+ return agesa_board_gpios;<br>+}<br>+<br>+/*<br>+ * GPE setup table must match ACPI GPE ASL<br>+ * { gevent, gpe, direction, level }<br>+ */<br>+static const struct sci_source gpe_table[] = {<br>+<br>+ /* EC AGPIO22/Gevent3 -> GPE 3 */<br>+ {<br>+ .scimap = 3,<br>+ .gpe = 3,<br>+ .direction = SMI_SCI_LVL_LOW,<br>+ .level = SMI_SCI_EDG,<br>+ },<br>+<br>+ /* PCIE/WLAN AGPIO2/Gevent8 -> GPE8 */<br>+ {<br>+ .scimap = 8,<br>+ .gpe = 8,<br>+ .direction = SMI_SCI_LVL_LOW,<br>+ .level = SMI_SCI_LVL,<br>+ },<br>+<br>+ /* EHCI USB_PME -> GPE24 */<br>+ {<br>+ .scimap = 24,<br>+ .gpe = 24,<br>+ .direction = SMI_SCI_LVL_HIGH,<br>+ .level = SMI_SCI_LVL,<br>+ },<br>+<br>+ /* XHCIC0 -> GPE31 */<br>+ {<br>+ .scimap = 56,<br>+ .gpe = 31,<br>+ .direction = SMI_SCI_LVL_HIGH,<br>+ .level = SMI_SCI_LVL,<br>+ },<br>+};<br>+<br>+const struct sci_source *get_gpe_table(size_t *num)<br>+{<br>+ *num = ARRAY_SIZE(gpe_table);<br>+ return gpe_table;<br>+}<br>diff --git a/src/mainboard/google/kahlee/variants/grunt/memory.c b/src/mainboard/google/kahlee/variants/grunt/memory.c<br>new file mode 100644<br>index 0000000..99a315b<br>--- /dev/null<br>+++ b/src/mainboard/google/kahlee/variants/grunt/memory.c<br>@@ -0,0 +1,58 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * Copyright 2017 Google Inc.<br>+ *<br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation; version 2 of the License.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+#include <baseboard/variants.h><br>+#include <boardid.h><br>+#include <cbfs.h><br>+#include <console/console.h><br>+#include <gpio.h> /* src/include/gpio.h */<br>+#include <spd_bin.h><br>+#include <string.h><br>+#include <variant/gpio.h><br>+#include <amdblocks/dimm_spd.h><br>+<br>+size_t variant_board_id(void)<br>+{<br>+ gpio_t pads[] = {<br>+ [2] = MEM_CONFIG2,<br>+ [1] = MEM_CONFIG1,<br>+ [0] = MEM_CONFIG0,<br>+ };<br>+<br>+ return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads));<br>+}<br>+<br>+int mainboard_read_spd(uint8_t spdAddress, char *buf,<br>+ size_t len)<br>+{<br>+ struct region_device spd_rdev;<br>+ u8 spd_index = board_id();<br>+<br>+ printk(BIOS_INFO, "%s SPD index %d\n", __func__, spd_index);<br>+<br>+ if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) {<br>+ printk(BIOS_ERR, "Error: spd.bin not found\n");<br>+ return -1;<br>+ }<br>+<br>+ if (len != region_device_sz(&spd_rdev)) {<br>+ printk(BIOS_ERR, "Error: spd.bin is not the correct size\n");<br>+ return -1;<br>+ }<br>+<br>+ /* Memory leak is ok since we have memory mapped boot media */<br>+ memcpy(buf, rdev_mmap_full(&spd_rdev), len);<br>+ return 0;<br>+}<br>diff --git a/src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc b/src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc<br>new file mode 100644<br>index 0000000..c199629<br>--- /dev/null<br>+++ b/src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc<br>@@ -0,0 +1,26 @@<br>+##<br>+## This file is part of the coreboot project.<br>+##<br>+## Copyright (C) 2014 Google Inc.<br>+## Copyright (C) 2015 Intel Corporation.<br>+##<br>+## This program is free software; you can redistribute it and/or modify<br>+## it under the terms of the GNU General Public License as published by<br>+## the Free Software Foundation; version 2 of the License.<br>+##<br>+## This program is distributed in the hope that it will be useful,<br>+## but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+## GNU General Public License for more details.<br>+##<br>+<br>+LIB_SPD_DEPS = $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/spd/$(f).spd.hex)<br>+<br>+SPD_SOURCES = empty # 0b000<br>+SPD_SOURCES += empty # 1b001<br>+SPD_SOURCES += empty # 2b010<br>+SPD_SOURCES += empty # 3b011<br>+SPD_SOURCES += empty # 4b100<br>+SPD_SOURCES += empty # 5b101<br>+SPD_SOURCES += empty # 6b110<br>+SPD_SOURCES += empty # 7b111<br>diff --git a/src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex b/src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex<br>new file mode 100644<br>index 0000000..67b46cd<br>--- /dev/null<br>+++ b/src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex<br>@@ -0,0 +1,32 @@<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br></pre><p>To view, visit <a href="https://review.coreboot.org/22486">change 22486</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22486"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I789002bfadc1a2b24f9046708986d29c0e2daf33 </div>
<div style="display:none"> Gerrit-Change-Number: 22486 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marc Jones <marc@marcjonesconsulting.com> </div>