<p>Naveen Manohar has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22456">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/kabylake: Add max98357a NHLT blob support<br><br>Add APIs and required parameters for creating max98357a SSP<br>endpoints in NHLT table.<br><br>The use of a NHLT table is required to make audio work<br>on the kabylake SoCs employing the internal DSP. The table<br>describes the audio endpoints (render) along with their supported<br>formats.<br><br>BUG=b:68686020<br>TEST=check that NHLT table for max98357 is created properly<br><br>Change-Id: Ia14216c0d0f651541040dea48defcc6f300d3a55<br>Signed-off-by: Naveen Manohar <naveen.m@intel.com><br>---<br>M src/soc/intel/skylake/Kconfig<br>M src/soc/intel/skylake/nhlt/Makefile.inc<br>2 files changed, 16 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/22456/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig<br>index f66065a..51a49e7 100644<br>--- a/src/soc/intel/skylake/Kconfig<br>+++ b/src/soc/intel/skylake/Kconfig<br>@@ -231,6 +231,12 @@<br>   help<br>    Include DSP firmware settings for 2 channel DMIC array.<br> <br>+config NHLT_DMIC_3CH<br>+  bool<br>+ default n<br>+    help<br>+   Include DSP firmware settings for 3 channel DMIC array.<br>+<br> config NHLT_DMIC_4CH<br>   bool<br>  default n<br>diff --git a/src/soc/intel/skylake/nhlt/Makefile.inc b/src/soc/intel/skylake/nhlt/Makefile.inc<br>index 9c9b4c8..3112ad7 100644<br>--- a/src/soc/intel/skylake/nhlt/Makefile.inc<br>+++ b/src/soc/intel/skylake/nhlt/Makefile.inc<br>@@ -16,6 +16,8 @@<br> <br> DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin<br> DMIC_2CH_48KHZ_32B = dmic-2ch-48khz-32b.bin<br>+DMIC_3CH_48KHZ_16B = dmic-3ch-48khz-16b.bin<br>+DMIC_3CH_48KHZ_32B = dmic-3ch-48khz-32b.bin<br> DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin<br> DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin<br> NAU88L25 = nau88l25-2ch-48khz-24b.bin<br>@@ -36,6 +38,14 @@<br> $(DMIC_2CH_48KHZ_32B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_32B)<br> $(DMIC_2CH_48KHZ_32B)-type := raw<br> <br>+cbfs-files-$(CONFIG_NHLT_DMIC_3CH) += $(DMIC_3CH_48KHZ_16B)<br>+$(DMIC_3CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_3CH_48KHZ_16B)<br>+$(DMIC_3CH_48KHZ_16B)-type := raw<br>+<br>+cbfs-files-$(CONFIG_NHLT_DMIC_3CH) += $(DMIC_3CH_48KHZ_32B)<br>+$(DMIC_3CH_48KHZ_32B)-file := $(NHLT_BLOB_PATH)/$(DMIC_3CH_48KHZ_32B)<br>+$(DMIC_3CH_48KHZ_32B)-type := raw<br>+<br> cbfs-files-$(CONFIG_NHLT_DMIC_4CH) += $(DMIC_4CH_48KHZ_16B)<br> $(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B)<br> $(DMIC_4CH_48KHZ_16B)-type := raw<br></pre><p>To view, visit <a href="https://review.coreboot.org/22456">change 22456</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22456"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia14216c0d0f651541040dea48defcc6f300d3a55 </div>
<div style="display:none"> Gerrit-Change-Number: 22456 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Naveen Manohar <naveen.m@intel.com> </div>