<p>Julien Viard de Galbert has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22309">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/denverton_ns: re-factoring hsio configuration<br><br>The main goal is to allow configuring the HSIO lines from the mainboard code.<br>Also share the code for both romstage and ramstage.<br>Remove de explicit dependency on the harcuvar mainboard.<br><br>Change-Id: Iec65472207309eae878d14eef5bc644b80fdbb1d<br>Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net><br>---<br>M src/soc/intel/denverton_ns/chip.c<br>M src/soc/intel/denverton_ns/fiamux.c<br>M src/soc/intel/denverton_ns/include/soc/fiamux.h<br>M src/soc/intel/denverton_ns/romstage.c<br>4 files changed, 10 insertions(+), 27 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/22309/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c<br>index 9547bec..813570e 100644<br>--- a/src/soc/intel/denverton_ns/chip.c<br>+++ b/src/soc/intel/denverton_ns/chip.c<br>@@ -31,8 +31,6 @@<br> #include <soc/ramstage.h><br> #include <soc/fiamux.h><br> #include <spi-generic.h><br>-#include <hsio.h><br>-#include <harcuvar_boardid.h><br> <br> static void pci_domain_set_resources(device_t dev)<br> {<br>@@ -74,7 +72,6 @@<br> {<br> size_t num;<br> uint16_t supported_hsio_lanes;<br>- uint8_t boardid = board_id();<br> BL_HSIO_INFORMATION *hsio_config;<br> BL_FIA_MUX_CONFIG_HOB *fiamux_hob_data = get_fiamux_hob_data();<br> <br>@@ -82,16 +79,7 @@<br> supported_hsio_lanes =<br> (uint16_t)fiamux_hob_data->FiaMuxConfig.SkuNumLanesAllowed;<br> <br>- switch (boardid) {<br>- case BoardIdHarcuvar:<br>- num = ARRAY_SIZE(harcuvar_hsio_config);<br>- hsio_config = (BL_HSIO_INFORMATION *)harcuvar_hsio_config;<br>- break;<br>- default:<br>- num = 0;<br>- hsio_config = NULL;<br>- break;<br>- }<br>+ num = mainboard_get_hsio_config(&hsio_config);<br> <br> if (get_fiamux_hsio_info(supported_hsio_lanes, num, &hsio_config))<br> die("HSIO Configuration is invalid, please correct it!");<br>diff --git a/src/soc/intel/denverton_ns/fiamux.c b/src/soc/intel/denverton_ns/fiamux.c<br>index 282ba03..0cee5cd 100644<br>--- a/src/soc/intel/denverton_ns/fiamux.c<br>+++ b/src/soc/intel/denverton_ns/fiamux.c<br>@@ -138,3 +138,9 @@<br> <br> return fiamux_hob_data;<br> }<br>+<br>+__attribute__((weak)) size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config)<br>+{<br>+ *p_hsio_config = NULL;<br>+ return 0;<br>+}<br>diff --git a/src/soc/intel/denverton_ns/include/soc/fiamux.h b/src/soc/intel/denverton_ns/include/soc/fiamux.h<br>index e8aaf65..1ba57c3 100644<br>--- a/src/soc/intel/denverton_ns/include/soc/fiamux.h<br>+++ b/src/soc/intel/denverton_ns/include/soc/fiamux.h<br>@@ -24,4 +24,6 @@<br> BL_FIA_MUX_CONFIG_HOB *get_fiamux_hob_data(void);<br> void print_fiamux_config_hob(BL_FIA_MUX_CONFIG_HOB *fiamux_hob_data);<br> <br>+size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config);<br>+<br> #endif // _MAINBOARD_HARCUVAR_FIAMUX_H<br>diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c<br>index 512d8cc..4403b68 100644<br>--- a/src/soc/intel/denverton_ns/romstage.c<br>+++ b/src/soc/intel/denverton_ns/romstage.c<br>@@ -16,8 +16,6 @@<br> #include <cbmem.h><br> #include <console/console.h><br> #include <cpu/x86/mtrr.h><br>-#include <harcuvar_boardid.h><br>-#include <hsio.h><br> #include <reset.h><br> #include <soc/fiamux.h><br> #include <soc/iomap.h><br>@@ -237,7 +235,6 @@<br> FSPM_UPD *mupd = container_of(m_cfg, FSPM_UPD, FspmConfig);<br> size_t num;<br> uint16_t supported_hsio_lanes;<br>- uint8_t boardid = board_id();<br> BL_HSIO_INFORMATION *hsio_config;<br> <br> /* Set the parameters for MemoryInit */<br>@@ -250,17 +247,7 @@<br> /* Assume the validating silicon has max lanes. */<br> supported_hsio_lanes = BL_ME_FIA_MUX_LANE_NUM_MAX;<br> <br>- switch (boardid) {<br>- case BoardIdHarcuvar:<br>- num = ARRAY_SIZE(harcuvar_hsio_config);<br>- hsio_config =<br>- (BL_HSIO_INFORMATION *)harcuvar_hsio_config;<br>- break;<br>- default:<br>- num = 0;<br>- hsio_config = NULL;<br>- break;<br>- }<br>+ num = mainboard_get_hsio_config(&hsio_config);<br> <br> if (get_fiamux_hsio_info(supported_hsio_lanes, num,<br> &hsio_config))<br></pre><p>To view, visit <a href="https://review.coreboot.org/22309">change 22309</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22309"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iec65472207309eae878d14eef5bc644b80fdbb1d </div>
<div style="display:none"> Gerrit-Change-Number: 22309 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert@online.net> </div>