<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22259">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/sandybridge/raminit: Set REFIx9 according to spec<br><br>Set tREFIx9 to 8.9*tREFI/1024 as suggested in<br>xeon-e3-1200v3-vol-2-datasheet.pdf chapter 4.2.15 or<br>2nd-gen-core-family-mobile-vol-2-datasheet chapter 2.14.1.<br><br>Use the minimum value of REFI*8.9 and tRASmax as suggested by<br>3rd-gen-core-desktop-vol-2-datasheet.pdf chapter 2.13.9.<br><br>Change-Id: Ifd32a70f28aa75418030b0e4d1fc7d539a315f83<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/northbridge/intel/sandybridge/raminit_common.c<br>1 file changed, 12 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/22259/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c<br>index eaef5f7..88357f6 100644<br>--- a/src/northbridge/intel/sandybridge/raminit_common.c<br>+++ b/src/northbridge/intel/sandybridge/raminit_common.c<br>@@ -263,16 +263,18 @@<br> <br>             dram_odt_stretch(ctrl, channel);<br> <br>-          // REFI<br>-              reg = 0;<br>-             val32 = ctrl->tREFI;<br>-              reg = (reg & ~0xffff) | val32;<br>-           val32 = ctrl->tRFC;<br>-               reg = (reg & ~0x1ff0000) | (val32 << 16);<br>-          val32 = (u32) (ctrl->tREFI * 9) / 1024;<br>-           reg = (reg & ~0xfe000000) | (val32 << 25);<br>-         printram("REFI [%x] = %x\n", 0x400 * channel + 0x4298,<br>-                    reg);<br>+         /*<br>+            * TC—Refresh timing parameters<br>+             * The tREFIx9 field should be programmed to minimum of<br>+               * 8.9*tREFI (to allow for possible delays from ZQ or<br>+                 * isoc) and tRASmax (70us) divided by 1024.<br>+          */<br>+          val32 = MIN((ctrl->tREFI * 89) / 10, (70000 << 8) / ctrl->tCK);<br>+<br>+               reg = ((ctrl->tREFI & 0xffff) << 0) |<br>+                   ((ctrl->tRFC & 0x1ff) << 16) |<br>+                  (((val32 / 1024) & 0x7f) << 25);<br>+           printram("REFI [%x] = %x\n", 0x400 * channel + 0x4298, reg);<br>                MCHBAR32(0x400 * channel + 0x4298) = reg;<br> <br>          MCHBAR32(0x400 * channel + 0x4294) |= 0xff;<br></pre><p>To view, visit <a href="https://review.coreboot.org/22259">change 22259</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22259"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ifd32a70f28aa75418030b0e4d1fc7d539a315f83 </div>
<div style="display:none"> Gerrit-Change-Number: 22259 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>