<p>Lubomir Rintel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22262">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">vx900: decode the whole ROM image<br><br>Fixes supports for flash ROMs larger than 512K, such as the 1M one in<br>HP t5550 Thin Client.<br><br>Change-Id: I4d6287e130809c33dfbd40bce7913a95b4b3a9c7<br>Signed-off-by: Lubomir Rintel <lkundrak@v3.sk><br>---<br>M src/northbridge/via/vx900/Kconfig<br>A src/northbridge/via/vx900/bootblock.c<br>2 files changed, 50 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/22262/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/northbridge/via/vx900/Kconfig b/src/northbridge/via/vx900/Kconfig<br>index 4b1e6cc..bb5e06f 100644<br>--- a/src/northbridge/via/vx900/Kconfig<br>+++ b/src/northbridge/via/vx900/Kconfig<br>@@ -41,4 +41,8 @@<br>     string<br>        default "1106,7122"<br> <br>+config BOOTBLOCK_NORTHBRIDGE_INIT<br>+ string<br>+       default "northbridge/via/vx900/bootblock.c"<br>+<br> endif<br>diff --git a/src/northbridge/via/vx900/bootblock.c b/src/northbridge/via/vx900/bootblock.c<br>new file mode 100644<br>index 0000000..11123b6<br>--- /dev/null<br>+++ b/src/northbridge/via/vx900/bootblock.c<br>@@ -0,0 +1,46 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * Copyright (C) 2017 Lubomir Rintel <lkundrak@v3.sk><br>+ *<br>+ * This program is free software: you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation, either version 2 of the License, or<br>+ * (at your option) any later version.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+#include <arch/io.h><br>+<br>+#if CONFIG_ROM_SIZE == 0x80000<br>+#  define ROM_DECODE_MAP 0x00<br>+#elif CONFIG_ROM_SIZE == 0x100000<br>+#  define ROM_DECODE_MAP 0x40<br>+#elif CONFIG_ROM_SIZE == 0x180000<br>+#  define ROM_DECODE_MAP 0x60<br>+#elif CONFIG_ROM_SIZE == 0x200000<br>+#  define ROM_DECODE_MAP 0x70<br>+#elif CONFIG_ROM_SIZE == 0x280000<br>+#  define ROM_DECODE_MAP 0x78<br>+#elif CONFIG_ROM_SIZE == 0x300000<br>+#  define ROM_DECODE_MAP 0x7c<br>+#elif CONFIG_ROM_SIZE == 0x380000<br>+#  define ROM_DECODE_MAP 0x7e<br>+#elif CONFIG_ROM_SIZE == 0x400000<br>+#  define ROM_DECODE_MAP 0x7f<br>+#else<br>+#  error "Bad CONFIG_ROM_SIZE"<br>+#endif<br>+<br>+static void bootblock_northbridge_init(void)<br>+{<br>+ u8 reg;<br>+<br>+   pci_io_read_config8(PCI_DEV(0, 0x11, 0), 0x41);<br>+      reg |= ROM_DECODE_MAP;<br>+       pci_io_write_config8(PCI_DEV(0, 0x11, 0), 0x41, reg);<br>+}<br></pre><p>To view, visit <a href="https://review.coreboot.org/22262">change 22262</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22262"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4d6287e130809c33dfbd40bce7913a95b4b3a9c7 </div>
<div style="display:none"> Gerrit-Change-Number: 22262 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lubomir Rintel <lkundrak@v3.sk> </div>