<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22191">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[wip]soc/intel/apollolake: Switch to common p2sb<br><br>Using common p2sb driver instead of private one.<br><br>TEST=None<br><br>Change-Id: I30f3ef7bc37a8cb268af6fe2e4da3ec835c17633<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/apollolake/Kconfig<br>M src/soc/intel/apollolake/Makefile.inc<br>M src/soc/intel/apollolake/chip.c<br>D src/soc/intel/apollolake/include/soc/p2sb.h<br>D src/soc/intel/apollolake/p2sb.c<br>5 files changed, 2 insertions(+), 104 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/22191/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig<br>index 36981ef..e8bfb07 100644<br>--- a/src/soc/intel/apollolake/Kconfig<br>+++ b/src/soc/intel/apollolake/Kconfig<br>@@ -75,6 +75,7 @@<br>   select SOC_INTEL_COMMON_BLOCK_LPC<br>     select SOC_INTEL_COMMON_BLOCK_LPSS<br>    select SOC_INTEL_COMMON_BLOCK_PCR<br>+    select SOC_INTEL_COMMON_BLOCK_P2SB<br>    select SOC_INTEL_COMMON_BLOCK_PMC<br>     select SOC_INTEL_COMMON_BLOCK_RTC<br>     select SOC_INTEL_COMMON_BLOCK_SA<br>diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc<br>index e860daa..2848bed 100644<br>--- a/src/soc/intel/apollolake/Makefile.inc<br>+++ b/src/soc/intel/apollolake/Makefile.inc<br>@@ -56,7 +56,6 @@<br> ramstage-y += lpc.c<br> ramstage-y += memmap.c<br> ramstage-y += mmap_boot.c<br>-ramstage-y += p2sb.c<br> ramstage-y += uart.c<br> ramstage-y += nhlt.c<br> ramstage-y += systemagent.c<br>diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c<br>index 405a45c..74e2190 100644<br>--- a/src/soc/intel/apollolake/chip.c<br>+++ b/src/soc/intel/apollolake/chip.c<br>@@ -28,6 +28,7 @@<br> #include <device/pci.h><br> #include <intelblocks/acpi.h><br> #include <intelblocks/fast_spi.h><br>+#include <intelblocks/p2sb.h><br> #include <intelblocks/msr.h><br> #include <fsp/api.h><br> #include <fsp/util.h><br>@@ -43,7 +44,6 @@<br> #include <spi-generic.h><br> #include <soc/cpu.h><br> #include <soc/pm.h><br>-#include <soc/p2sb.h><br> #include <soc/systemagent.h><br> <br> #include "chip.h"<br>diff --git a/src/soc/intel/apollolake/include/soc/p2sb.h b/src/soc/intel/apollolake/include/soc/p2sb.h<br>deleted file mode 100644<br>index a0bcc67..0000000<br>--- a/src/soc/intel/apollolake/include/soc/p2sb.h<br>+++ /dev/null<br>@@ -1,23 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright 2016 Google Inc.<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; either version 2 of the License, or<br>- * (at your option) any later version.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-#ifndef _SOC_APOLLOLAKE_P2SB_H_<br>-#define _SOC_APOLLOLAKE_P2SB_H_<br>-<br>-void p2sb_unhide(void);<br>-void p2sb_hide(void);<br>-<br>-#endif /* _SOC_APOLLOLAKE_P2SB_H_ */<br>diff --git a/src/soc/intel/apollolake/p2sb.c b/src/soc/intel/apollolake/p2sb.c<br>deleted file mode 100644<br>index f0e584b..0000000<br>--- a/src/soc/intel/apollolake/p2sb.c<br>+++ /dev/null<br>@@ -1,79 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright 2016 Google Inc.<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-#include <arch/io.h><br>-#include <console/console.h><br>-#include <device/device.h><br>-#include <device/pci.h><br>-#include <device/pci_ids.h><br>-#include <rules.h><br>-#include <soc/iomap.h><br>-#include <soc/pci_devs.h><br>-#include <soc/p2sb.h><br>-<br>-#define P2SB_E0 0xe0<br>-#define HIDE_BIT (1 << 0)<br>-<br>-static void p2sb_set_hide_bit(int hide)<br>-{<br>-  struct device *dev;<br>-  const uint16_t reg = P2SB_E0 + 1;<br>-    const uint8_t mask = HIDE_BIT;<br>-       uint8_t val;<br>-<br>-      dev = PCH_DEV_P2SB;<br>-<br>-       val = pci_read_config8(dev, reg);<br>-    val &= ~mask;<br>-    if (hide)<br>-            val |= mask;<br>- pci_write_config8(dev, reg, val);<br>-}<br>-<br>-void p2sb_unhide(void)<br>-{<br>-        p2sb_set_hide_bit(0);<br>-}<br>-<br>-void p2sb_hide(void)<br>-{<br>-      p2sb_set_hide_bit(HIDE_BIT);<br>-}<br>-<br>-static void read_resources(struct device *dev)<br>-{<br>-     /*<br>-    * There's only one resource on the P2SB device. It's also already<br>-    * manually set to a fixed address in earlier boot stages.<br>-    */<br>-  mmio_resource(dev, PCI_BASE_ADDRESS_0, P2SB_BAR / KiB, P2SB_SIZE / KiB);<br>-}<br>-<br>-static const struct device_operations device_ops = {<br>-       .read_resources         = read_resources,<br>-    .set_resources          = DEVICE_NOOP,<br>-};<br>-<br>-static const unsigned short pci_device_ids[] = {<br>-    PCI_DEVICE_ID_INTEL_APL_P2SB,<br>-        PCI_DEVICE_ID_INTEL_GLK_P2SB,<br>-        0,<br>-};<br>-<br>-static const struct pci_driver pmc __pci_driver = {<br>-     .ops    = &device_ops,<br>-   .vendor = PCI_VENDOR_ID_INTEL,<br>-       .devices = pci_device_ids,<br>-};<br></pre><p>To view, visit <a href="https://review.coreboot.org/22191">change 22191</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22191"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I30f3ef7bc37a8cb268af6fe2e4da3ec835c17633 </div>
<div style="display:none"> Gerrit-Change-Number: 22191 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>