<p>Mario Scheithauer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22139">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">siemens/mc_apl1: Legacy IRQ routing for PCI devices<br><br>On this mainboard there are PCI devices, which are connected to the PCIe<br>root port via a PCIe-2-PCI bridge. One of the devices only supports the<br>legacy interrupt routing. For this reason we have to adjust the PIR6<br>register (0x314c) which is responsible for PCIe device 13h and 14h. This<br>means that the interrupt routing will also be the same for both PCIe<br>devices. The bridge is connected to PCIe root port 4 (Device 14.0).<br><br>The following routing is required:<br>INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#->PIRQA#<br><br>Change-Id: I5464c9a2669773bc1e6cd4b4d29d1be838dbfa27<br>Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com><br>---<br>M src/mainboard/siemens/mc_apl1/mainboard.c<br>1 file changed, 8 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/22139/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c<br>index f77ef75..76fad82 100644<br>--- a/src/mainboard/siemens/mc_apl1/mainboard.c<br>+++ b/src/mainboard/siemens/mc_apl1/mainboard.c<br>@@ -21,7 +21,9 @@<br> #include <hwilib.h><br> #include <i210.h><br> #include <intelblocks/lpc_lib.h><br>+#include <intelblocks/pcr.h><br> #include <soc/pci_devs.h><br>+#include <soc/pcr_ids.h><br> #include <string.h><br> #include <bootstate.h><br> #include <timer.h><br>@@ -142,6 +144,12 @@<br>                cmd |= PCI_COMMAND_MASTER;<br>            pci_write_config16(dev, PCI_COMMAND, cmd);<br>    }<br>+<br>+ /*<br>+    * mc_apl1 LM2 - PIR6 register mapping for PCIe root ports<br>+    * INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#<br>+    */<br>+  pcr_write16(PID_ITSS, 0x314c, 0x0321);<br> }<br> <br> static void wait_for_legacy_dev(void *unused)<br></pre><p>To view, visit <a href="https://review.coreboot.org/22139">change 22139</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22139"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I5464c9a2669773bc1e6cd4b4d29d1be838dbfa27 </div>
<div style="display:none"> Gerrit-Change-Number: 22139 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Mario Scheithauer <mario.scheithauer@siemens.com> </div>