<p>Furquan Shaikh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22081">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/block/pmc: Add helper routines to read/write PM1_CNT<br><br>This change adds and uses helper routines for reading and writing<br>PM1_CNT register.<br><br>BUG=b:67874513<br><br>Change-Id: I69b9347ab54a392b67ba733eb00922583dc1ee5f<br>Signed-off-by: Furquan Shaikh <furquan@chromium.org><br>---<br>M src/soc/intel/common/block/include/intelblocks/pmclib.h<br>M src/soc/intel/common/block/pmc/pmclib.c<br>2 files changed, 24 insertions(+), 9 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/22081/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h<br>index f2301a9..f8f8acd 100644<br>--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h<br>+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h<br>@@ -47,6 +47,9 @@<br> void pmc_update_pm1_enable(uint16_t events);<br> uint16_t pmc_read_pm1_enable(void);<br> <br>+uint32_t pmc_read_pm1_control(void);<br>+void pmc_write_pm1_control(uint32_t pm1_cnt);<br>+<br> /*<br>  * Function to print, clear, and return SMI status bits in SMI_STS<br>  * register. This function internally calls pmc_reset_smi_status with<br>diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c<br>index 83de926..925b241 100644<br>--- a/src/soc/intel/common/block/pmc/pmclib.c<br>+++ b/src/soc/intel/common/block/pmc/pmclib.c<br>@@ -155,18 +155,28 @@<br>         outw(events, ACPI_BASE_ADDRESS + PM1_EN);<br> }<br> <br>+uint32_t pmc_read_pm1_control(void)<br>+{<br>+   return inl(ACPI_BASE_ADDRESS + PM1_CNT);<br>+}<br>+<br>+void pmc_write_pm1_control(uint32_t pm1_cnt)<br>+{<br>+   outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT);<br>+}<br>+<br> void pmc_enable_pm1_control(uint32_t mask)<br> {<br>-  uint32_t pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);<br>+ uint32_t pm1_cnt = pmc_read_pm1_control();<br>    pm1_cnt |= mask;<br>-     outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT);<br>+  pmc_write_pm1_control(pm1_cnt);<br> }<br> <br> void pmc_disable_pm1_control(uint32_t mask)<br> {<br>-     uint32_t pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);<br>+ uint32_t pm1_cnt = pmc_read_pm1_control();<br>    pm1_cnt &= ~mask;<br>-        outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT);<br>+  pmc_write_pm1_control(pm1_cnt);<br> }<br> <br> static uint16_t reset_pm1_status(void)<br>@@ -357,7 +367,7 @@<br>          }<br> <br>          /* Clear SLP_TYP. */<br>-         outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);<br>+          pmc_write_pm1_control(ps->pm1_cnt & ~(SLP_TYP));<br>       }<br>     return soc_prev_sleep_state(ps, prev_sleep_state);<br> }<br>@@ -392,7 +402,7 @@<br> <br>        ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS);<br>    ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN);<br>-     ps->pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);<br>+   ps->pm1_cnt = pmc_read_pm1_control();<br> <br>   printk(BIOS_DEBUG, "pm1_sts: %04x pm1_en: %04x pm1_cnt: %08x\n",<br>           ps->pm1_sts, ps->pm1_en, ps->pm1_cnt);<br>@@ -468,7 +478,7 @@<br>   if (!(inw(ACPI_BASE_ADDRESS + PM1_STS) & WAK_STS))<br>                return 0;<br> <br>- return acpi_sleep_from_pm1(inl(ACPI_BASE_ADDRESS + PM1_CNT)) == ACPI_S3;<br>+     return acpi_sleep_from_pm1(pmc_read_pm1_control()) == ACPI_S3;<br> }<br> <br> /* Read and clear GPE status (defined in arch/acpi.h) */<br>@@ -510,8 +520,10 @@<br>  */<br> void vboot_platform_prepare_reboot(void)<br> {<br>-  const uint16_t port = ACPI_BASE_ADDRESS + PM1_CNT;<br>-   outl((inl(port) & ~(SLP_TYP)) | (SLP_TYP_S5 << SLP_TYP_SHIFT), port);<br>+      uint32_t pm1_cnt;<br>+    pm1_cnt = (pmc_read_pm1_control() & ~(SLP_TYP)) |<br>+                (SLP_TYP_S5 << SLP_TYP_SHIFT);<br>+ pmc_write_pm1_control(pm1_cnt);<br> }<br> <br> void poweroff(void)<br></pre><p>To view, visit <a href="https://review.coreboot.org/22081">change 22081</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22081"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I69b9347ab54a392b67ba733eb00922583dc1ee5f </div>
<div style="display:none"> Gerrit-Change-Number: 22081 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Furquan Shaikh <furquan@google.com> </div>