<p>frank vibrans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21991">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">(WIP) soc/amd/common: Enable PSP in SMM<br><br>Install BIOS-to-PSP communications for SMM. The BIOS-to-PSP<br>communications requires a command/response buffer in SMM space<br>after BIOS boot complete that is provided by this code.<br><br>Change-Id: I50565d6e4e694f542bccb9f5f24b294454d3a37f<br>Signed-off-by: Frank Vibrans <frank.vibrans@scarletltd.com><br>---<br>M src/soc/amd/common/block/include/amdblocks/psp.h<br>M src/soc/amd/common/block/psp/Makefile.inc<br>M src/soc/amd/common/block/psp/psp.c<br>3 files changed, 59 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/21991/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h<br>index 96b1a11..7915b1f 100644<br>--- a/src/soc/amd/common/block/include/amdblocks/psp.h<br>+++ b/src/soc/amd/common/block/include/amdblocks/psp.h<br>@@ -18,8 +18,6 @@<br> <br> #include <stdint.h><br> #include <compiler.h><br>-#include <Porting.h><br>-#include <Proc/Psp/PspBaseLib/PspBaseLib.h><br> <br> /* x86 to PSP commands */<br> #define MBOX_BIOS_CMD_DRAM_INFO 0x01<br>@@ -114,6 +112,27 @@<br> #define PSP_INIT_TIMEOUT 10000 /* 10 seconds */<br> #define PSP_CMD_TIMEOUT 1000 /* 1 second */<br> <br>+/* This set of definitions is copied from AMD's vendorcode/PspBaseLib.h<br>+ * which cannot be included in the SMM environment.<br>+ */<br>+#if ENV_SMM<br>+#define PSP_PCI_SEG 0x00 /* PSP Seg address */<br>+#define PSP_PCI_BUS 0x00 /* PSP Bus address */<br>+#define PSP_PCI_DEV 0x08 /* PSP Device address */<br>+#define PSP_PCI_FN 0x00 /* PSP Fn address */<br>+#define PSP_PCI_BDA ((PSP_PCI_DEV << 11) + (PSP_PCI_FN << 8))<br>+<br>+#define PSP_PCI_BAR3_REG 0x20 /* Pci Bar3 */<br>+#define PSP_PCI_EXTRAPCIHDR_REG 0x48 /* Extra PCI Header Ctr */<br>+<br>+/* PSP Private Block Base Address */<br>+#define PSP_MSR_PRIVATE_BLOCK_BAR 0xc00110a2<br>+#define PSP_MAILBOX_BASE 0x70 /* Mailbox base offset on BAR */<br>+<br>+/* This is a hack to provide a bogus prototype for compiling for SMM. */<br>+bool PspBarInitEarly(void);<br>+#endif<br>+<br> /* BIOS-to-PSP functions return 0 if successful, else negative value */<br> int psp_notify_dram(void);<br> int psp_notify_smm_info(uintptr_t base, size_t length, uintptr_t psp_data_base,<br>diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc<br>index eebba16..b4f3b8d 100644<br>--- a/src/soc/amd/common/block/psp/Makefile.inc<br>+++ b/src/soc/amd/common/block/psp/Makefile.inc<br>@@ -1,2 +1,3 @@<br> romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c<br> ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c<br>+smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c<br>diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c<br>index ae90621..5bbdf41 100644<br>--- a/src/soc/amd/common/block/psp/psp.c<br>+++ b/src/soc/amd/common/block/psp/psp.c<br>@@ -14,11 +14,17 @@<br> */<br> <br> #include <stddef.h><br>+#include <types.h><br> #include <arch/io.h><br> #include <timer.h><br>+#include <cpu/x86/msr.h><br> #include <device/pci_def.h><br> #include <console/console.h><br> #include <amdblocks/psp.h><br>+#if !ENV_SMM<br>+# include <Porting.h><br>+# include <Proc/Psp/PspBaseLib/PspBaseLib.h><br>+#endif<br> <br> static const char *psp_status_nobase = "error: PSP BAR3 not assigned";<br> static const char *psp_status_halted = "error: PSP in halted state";<br>@@ -48,16 +54,39 @@<br> }<br> }<br> <br>+static bool get_psp_bar3addr(uint32_t *psp_mmio)<br>+{<br>+ msr_t psp_addr;<br>+ uint32_t pci_reg48;<br>+ uint32_t t_mmio = 0xffffffff;<br>+<br>+ pci_reg48 = pci_read_config32(PSP_DEV, PSP_PCI_EXTRAPCIHDR_REG);<br>+ if (pci_reg48 & BIT(12)) {<br>+ psp_addr = rdmsr(PSP_MSR_PRIVATE_BLOCK_BAR);<br>+ t_mmio = psp_addr.lo;<br>+ } else {<br>+ t_mmio = pci_read_config32(PSP_DEV, PSP_PCI_BAR3_REG) & 0xFFF00000;<br>+ }<br>+<br>+ if (t_mmio == 0xffffffff)<br>+ return false;<br>+<br>+ *psp_mmio = t_mmio;<br>+ return true;<br>+}<br>+<br> static struct psp_mbox *get_mbox_address(void)<br> {<br>- UINT32 base; /* UINT32 for compatibility with PspBaseLib */<br>- BOOLEAN bar3_status;<br>+ uint32_t base;<br>+ bool bar3_status;<br> uintptr_t baseptr;<br> <br>- bar3_status = GetPspBar3Addr(&base);<br>- if (!bar3_status) {<br>- PspBarInitEarly();<br>- bar3_status = GetPspBar3Addr(&base);<br>+ bar3_status = get_psp_bar3addr(&base);<br>+ if (!ENV_SMM) {<br>+ if (!bar3_status) {<br>+ PspBarInitEarly();<br>+ bar3_status = get_psp_bar3addr(&base);<br>+ }<br> }<br> if (!bar3_status)<br> return NULL;<br>@@ -194,7 +223,7 @@<br> printk(BIOS_DEBUG, "buffer status=0x%x ",<br> rd_resp_sts(&buffer));<br> if (cmd_status)<br>- printk(BIOS_DEBUG, "%s\n", status_to_string(cmd_status));<br>+ printk(BIOS_ERR, "%s\n", status_to_string(cmd_status));<br> else<br> printk(BIOS_DEBUG, "OK\n");<br> <br>@@ -224,7 +253,7 @@<br> cmd_status = send_psp_command(MBOX_BIOS_CMD_SMM_INFO, &buffer);<br> <br> if (cmd_status)<br>- printk(BIOS_DEBUG, "%s\n", status_to_string(cmd_status));<br>+ printk(BIOS_ERR, "%s\n", status_to_string(cmd_status));<br> else<br> printk(BIOS_DEBUG, "OK\n");<br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/21991">change 21991</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21991"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I50565d6e4e694f542bccb9f5f24b294454d3a37f </div>
<div style="display:none"> Gerrit-Change-Number: 21991 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: frank vibrans <frank.vibrans@scarletltd.com> </div>