<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21942">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Set platform Debug Probe Type<br><br>Add option for user to select what kind of probe can be used for<br>platform debug.<br><br>TEST=Select to XDP and boot up system with XDP hooked, able to halt.<br><br>Change-Id: Ib6add93e3f1c8a646aa625a4cea9be0acecc0487<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/cannonlake/chip.h<br>M src/soc/intel/cannonlake/romstage/romstage.c<br>2 files changed, 7 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/21942/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h<br>index ee908f0..cf7b8c1 100644<br>--- a/src/soc/intel/cannonlake/chip.h<br>+++ b/src/soc/intel/cannonlake/chip.h<br>@@ -206,6 +206,11 @@<br>       */<br>   uint32_t PrmrrSize;<br>   uint8_t PmTimerDisabled;<br>+     /* Descired platform debug type.<br>+      * 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),<br>+        * 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC)<br>+         */<br>+  uint8_t DebugConsent;<br>         /*<br>     * SerialIO device mode selection:<br>     *<br>diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c<br>index 3c26ec2..296f4f8 100644<br>--- a/src/soc/intel/cannonlake/romstage/romstage.c<br>+++ b/src/soc/intel/cannonlake/romstage/romstage.c<br>@@ -105,6 +105,8 @@<br> <br>   /* Enable SMBus controller based on config */<br>         m_cfg->SmbusEnable = config->SmbusEnable;<br>+      /* Set Debug probe type */<br>+   m_cfg->PlatformDebugConsent = config->DebugConsent;<br> <br>  mainboard_memory_init_params(mupd);<br> }<br></pre><p>To view, visit <a href="https://review.coreboot.org/21942">change 21942</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21942"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib6add93e3f1c8a646aa625a4cea9be0acecc0487 </div>
<div style="display:none"> Gerrit-Change-Number: 21942 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>