<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21892">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Enabled MRC Cache<br><br>Enable MRC cache by default.<br><br>TEST=Warm reset and check coreboot serial log.<br><br>Change-Id: I76ece361867737c01cc848c24d8893d43a3d292e<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/cannonlake/Kconfig<br>1 file changed, 2 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/21892/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig<br>index 2d9ffa4..756cdc4 100644<br>--- a/src/soc/intel/cannonlake/Kconfig<br>+++ b/src/soc/intel/cannonlake/Kconfig<br>@@ -15,6 +15,7 @@<br>    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH<br>         select BOOT_DEVICE_SUPPORTS_WRITES<br>    select C_ENVIRONMENT_BOOTBLOCK<br>+       select CACHE_MRC_SETTINGS<br>     select COMMON_FADT<br>    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE<br>     select GENERIC_GPIO_LIB<br>@@ -26,6 +27,7 @@<br>    select INTEL_CAR_NEM_ENHANCED<br>         select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP<br>     select IOAPIC<br>+        select MRC_SETTINGS_PROTECT<br>   select PARALLEL_MP<br>    select PARALLEL_MP_AP_WORK<br>    select PLATFORM_USES_FSP2_0<br></pre><p>To view, visit <a href="https://review.coreboot.org/21892">change 21892</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21892"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I76ece361867737c01cc848c24d8893d43a3d292e </div>
<div style="display:none"> Gerrit-Change-Number: 21892 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>