<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21885">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[DoNotMerge]intel/mainboard/cannonlake: Disable HDA temporary<br><br>Disable HDA by default for now.<br><br>Change-Id: Icc1ad7db527f419cc32d6714cc94edff44e64200<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb<br>M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb<br>2 files changed, 2 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/21885/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb<br>index 119af48..c4e85b2 100644<br>--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb<br>+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb<br>@@ -81,7 +81,7 @@<br>              end # LPC Interface<br>           device pci 1f.1 on  end # P2SB<br>                device pci 1f.2 on  end # Power Management Controller<br>-                device pci 1f.3 on  end # Intel HDA<br>+          device pci 1f.3 off  end # Intel HDA<br>          device pci 1f.4 on  end # SMBus<br>               device pci 1f.5 on  end # PCH SPI<br>             device pci 1f.6 off end # GbE<br>diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb<br>index 6e7c535..8f0fa3f 100644<br>--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb<br>+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb<br>@@ -81,7 +81,7 @@<br>                 end # LPC Interface<br>           device pci 1f.1 on  end # P2SB<br>                device pci 1f.2 on  end # Power Management Controller<br>-                device pci 1f.3 on  end # Intel HDA<br>+          device pci 1f.3 off  end # Intel HDA<br>          device pci 1f.4 on  end # SMBus<br>               device pci 1f.5 on  end # PCH SPI<br>             device pci 1f.6 off end # GbE<br></pre><p>To view, visit <a href="https://review.coreboot.org/21885">change 21885</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21885"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Icc1ad7db527f419cc32d6714cc94edff44e64200 </div>
<div style="display:none"> Gerrit-Change-Number: 21885 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>