<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21856">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/common: Add DRAM clear option to agesawrapper<br><br>AmdInitPost() can be instructed to clear DRAM after a reset or to<br>preserve it.  Expand agesawrapper.c to tell AGESA which action to<br>take.<br><br>Note that any overrides in place are not affected by this change.<br><br>Change-Id: Ie18e7a265b6e0a00c0cc8912db6361087f772d2d<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/common/agesawrapper.c<br>M src/soc/amd/stoneyridge/chip.h<br>2 files changed, 8 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/21856/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/common/agesawrapper.c b/src/soc/amd/common/agesawrapper.c<br>index 659797a..93f7eb4 100644<br>--- a/src/soc/amd/common/agesawrapper.c<br>+++ b/src/soc/amd/common/agesawrapper.c<br>@@ -142,6 +142,8 @@<br>    PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr;<br> <br>       if (cfg) {<br>+           PostParams->MemConfig.EnableMemClr = cfg->dram_clear;<br>+<br>                PostParams->MemConfig.UmaMode = cfg->uma_mode;<br>          PostParams->MemConfig.UmaVersion = cfg->uma_type;<br>               if (cfg->uma_mode == UMAMODE_SPECIFIED)<br>diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h<br>index 01127b0..f73b252 100644<br>--- a/src/soc/amd/stoneyridge/chip.h<br>+++ b/src/soc/amd/stoneyridge/chip.h<br>@@ -49,6 +49,12 @@<br>       u32 uma_size;<br> <br>      u8 spdAddrLookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH];<br>+  u8 dram_clear;<br>+               /* Clear DRAM - must correspond to AGESA TRUE */<br>+             #define DRAM_CONTENTS_CLEAR 1<br>+                /* Do not clear DRAM - must correspond to AGESA FALSE */<br>+             #define DRAM_CONTENTS_KEEP 0<br>+<br>       u32 ide0_enable : 1;<br>  u32 sata0_enable : 1;<br>         u32 boot_switch_sata_ide : 1;<br></pre><p>To view, visit <a href="https://review.coreboot.org/21856">change 21856</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21856"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie18e7a265b6e0a00c0cc8912db6361087f772d2d </div>
<div style="display:none"> Gerrit-Change-Number: 21856 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>