<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21775">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/pineview: Port ACPI opregion to pineview<br><br>Port the ACPI opregion implementation that resides in<br>drivers/intel/gma to older platforms. It allows to include a vbt.bin and<br>allows GNU/Linux to load the opregion as ASLS is being set.<br><br>Windows' Intel will likely ignore it as it relies on legacy VBIOS<br>to be loaded at 0xc0000.<br><br>Change-Id: Ifc9fc52d84dcbb0da577e61467ece8a48752f44b<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/northbridge/intel/pineview/Kconfig<br>M src/northbridge/intel/pineview/gma.c<br>2 files changed, 52 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/21775/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig<br>index 1af8d3c..e8ef9d9 100644<br>--- a/src/northbridge/intel/pineview/Kconfig<br>+++ b/src/northbridge/intel/pineview/Kconfig<br>@@ -28,6 +28,7 @@<br> select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT<br> select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT<br> select RELOCATABLE_RAMSTAGE<br>+ select INTEL_GMA_ACPI<br> <br> config BOOTBLOCK_NORTHBRIDGE_INIT<br> string<br>diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c<br>index c92428e..d47fc0e 100644<br>--- a/src/northbridge/intel/pineview/gma.c<br>+++ b/src/northbridge/intel/pineview/gma.c<br>@@ -31,6 +31,9 @@<br> #include "pineview.h"<br> #include <drivers/intel/gma/intel_bios.h><br> #include <drivers/intel/gma/i915.h><br>+#include <drivers/intel/gma/opregion.h><br>+#include <southbridge/intel/i82801gx/nvs.h><br>+#include <cbmem.h><br> #include <pc80/vga.h><br> #include <pc80/vga_io.h><br> <br>@@ -54,6 +57,19 @@<br> <br> static struct resource *gtt_res = NULL;<br> static struct resource *mmio_res = NULL;<br>+<br>+uintptr_t gma_get_gnvs_aslb(const void *gnvs)<br>+{<br>+ const global_nvs_t *gnvs_ptr = gnvs;<br>+ return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0);<br>+}<br>+<br>+void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)<br>+{<br>+ global_nvs_t *gnvs_ptr = gnvs;<br>+ if (gnvs_ptr)<br>+ gnvs_ptr->aslb = aslb;<br>+}<br> <br> static int gtt_setup(u8 *mmiobase)<br> {<br>@@ -278,6 +294,8 @@<br> /* Linux relies on VBT for panel info. */<br> generate_fake_intel_oprom(&conf->gfx, dev, "$VBT PINEVIEW");<br> }<br>+<br>+ intel_gma_restore_opregion();<br> }<br> <br> static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)<br>@@ -303,6 +321,37 @@<br> return &chip->gfx;<br> }<br> <br>+static unsigned long<br>+gma_write_acpi_tables(struct device *const dev,<br>+ unsigned long current,<br>+ struct acpi_rsdp *const rsdp)<br>+{<br>+ igd_opregion_t *opregion = (igd_opregion_t *)current;<br>+ global_nvs_t *gnvs;<br>+<br>+ if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)<br>+ return current;<br>+<br>+ current += sizeof(igd_opregion_t);<br>+<br>+ /* GNVS has been already set up */<br>+ gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);<br>+ if (gnvs) {<br>+ /* IGD OpRegion Base Address */<br>+ gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion);<br>+ } else {<br>+ printk(BIOS_ERR, "Error: GNVS table not found.\n");<br>+ }<br>+<br>+ current = acpi_align_current(current);<br>+ return current;<br>+}<br>+<br>+static const char *gma_acpi_name(const struct device *dev)<br>+{<br>+ return "GFX0";<br>+}<br>+<br> static struct pci_operations gma_pci_ops = {<br> .set_subsystem = gma_set_subsystem,<br> };<br>@@ -316,6 +365,8 @@<br> .scan_bus = 0,<br> .enable = 0,<br> .ops_pci = &gma_pci_ops,<br>+ .acpi_name = gma_acpi_name,<br>+ .write_acpi_tables = gma_write_acpi_tables,<br> };<br> <br> static const unsigned short pci_device_ids[] =<br></pre><p>To view, visit <a href="https://review.coreboot.org/21775">change 21775</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21775"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ifc9fc52d84dcbb0da577e61467ece8a48752f44b </div>
<div style="display:none"> Gerrit-Change-Number: 21775 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>