<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21674">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/common: Add SOUTHBRIDGE_INTEL_COMMON_SPI to include spi code<br><br>Change-Id: I970408e5656c0e8812b8609e2cc10d0bc8d8f6f2<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/southbridge/intel/bd82x6x/Kconfig<br>M src/southbridge/intel/bd82x6x/Makefile.inc<br>M src/southbridge/intel/common/Kconfig<br>M src/southbridge/intel/common/Makefile.inc<br>M src/southbridge/intel/fsp_bd82x6x/Kconfig<br>M src/southbridge/intel/fsp_bd82x6x/Makefile.inc<br>M src/southbridge/intel/fsp_i89xx/Kconfig<br>M src/southbridge/intel/fsp_i89xx/Makefile.inc<br>M src/southbridge/intel/i82801gx/Kconfig<br>M src/southbridge/intel/i82801gx/Makefile.inc<br>M src/southbridge/intel/ibexpeak/Kconfig<br>M src/southbridge/intel/ibexpeak/Makefile.inc<br>M src/southbridge/intel/lynxpoint/Kconfig<br>M src/southbridge/intel/lynxpoint/Makefile.inc<br>14 files changed, 15 insertions(+), 17 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/21674/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig<br>index e3772ba..fe1ca34 100644<br>--- a/src/southbridge/intel/bd82x6x/Kconfig<br>+++ b/src/southbridge/intel/bd82x6x/Kconfig<br>@@ -26,6 +26,7 @@<br> select ACPI_INTEL_HARDWARE_SLEEP_VALUES<br> select SOUTHBRIDGE_INTEL_COMMON<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_SPI<br> select IOAPIC<br> select HAVE_HARD_RESET<br> select HAVE_USBDEBUG_OPTIONS<br>@@ -33,7 +34,6 @@<br> select USE_WATCHDOG_ON_BOOT<br> select PCIEXP_ASPM<br> select PCIEXP_COMMON_CLOCK<br>- select SPI_FLASH<br> select COMMON_FADT<br> select ACPI_SATA_GENERATOR<br> select HAVE_INTEL_FIRMWARE<br>diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc<br>index 8e88268..a5825a8 100644<br>--- a/src/southbridge/intel/bd82x6x/Makefile.inc<br>+++ b/src/southbridge/intel/bd82x6x/Makefile.inc<br>@@ -35,8 +35,6 @@<br> ramstage-y += watchdog.c<br> <br> ramstage-$(CONFIG_ELOG) += elog.c<br>-ramstage-y += ../common/spi.c<br>-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c<br> <br> ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c<br> smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c<br>diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig<br>index 304ecbf..616658e 100644<br>--- a/src/southbridge/intel/common/Kconfig<br>+++ b/src/southbridge/intel/common/Kconfig<br>@@ -8,6 +8,10 @@<br> def_bool n<br> select HAVE_DEBUG_SMBUS<br> <br>+config SOUTHBRIDGE_INTEL_COMMON_SPI<br>+ def_bool n<br>+ select SPI_FLASH<br>+<br> config HAVE_INTEL_CHIPSET_LOCKDOWN<br> def_bool n<br> <br>diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc<br>index 5810394..0128505 100644<br>--- a/src/southbridge/intel/common/Makefile.inc<br>+++ b/src/southbridge/intel/common/Makefile.inc<br>@@ -28,4 +28,9 @@<br> romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c<br> ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c<br> <br>+ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c<br>+ifeq ($(CONFIG_SPI_FLASH_SMM),y)<br>+smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c<br>+endif<br>+<br> endif<br>diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig<br>index 08400b3..877a335 100644<br>--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig<br>+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig<br>@@ -28,11 +28,11 @@<br> select USE_WATCHDOG_ON_BOOT<br> select PCIEXP_ASPM<br> select PCIEXP_COMMON_CLOCK<br>- select SPI_FLASH<br> select COMMON_FADT<br> select HAVE_INTEL_FIRMWARE<br> select SOUTHBRIDGE_INTEL_COMMON<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_SPI<br> select HAVE_INTEL_CHIPSET_LOCKDOWN<br> <br> config EHCI_BAR<br>diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc<br>index 265633c..93253e9 100644<br>--- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc<br>+++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc<br>@@ -27,8 +27,6 @@<br> ramstage-y += watchdog.c<br> <br> ramstage-$(CONFIG_ELOG) += elog.c<br>-ramstage-y += ../common/spi.c<br>-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c<br> <br> ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c<br> smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c<br>diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig<br>index 67c2665..d0cb45c 100644<br>--- a/src/southbridge/intel/fsp_i89xx/Kconfig<br>+++ b/src/southbridge/intel/fsp_i89xx/Kconfig<br>@@ -28,12 +28,12 @@<br> select USE_WATCHDOG_ON_BOOT<br> select PCIEXP_ASPM<br> select PCIEXP_COMMON_CLOCK<br>- select SPI_FLASH<br> select COMMON_FADT<br> select HAVE_INTEL_FIRMWARE<br> select NO_EARLY_BOOTBLOCK_POSTCODES<br> select SOUTHBRIDGE_INTEL_COMMON<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_SPI<br> <br> config EHCI_BAR<br> hex<br>diff --git a/src/southbridge/intel/fsp_i89xx/Makefile.inc b/src/southbridge/intel/fsp_i89xx/Makefile.inc<br>index f9bbdc6..d8eb067 100644<br>--- a/src/southbridge/intel/fsp_i89xx/Makefile.inc<br>+++ b/src/southbridge/intel/fsp_i89xx/Makefile.inc<br>@@ -26,8 +26,6 @@<br> ramstage-y += watchdog.c<br> <br> ramstage-$(CONFIG_ELOG) += elog.c<br>-ramstage-y += ../common/spi.c<br>-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c<br> <br> ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c<br> smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c<br>diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig<br>index fd7579a..9fd19ed 100644<br>--- a/src/southbridge/intel/i82801gx/Kconfig<br>+++ b/src/southbridge/intel/i82801gx/Kconfig<br>@@ -23,9 +23,9 @@<br> select USE_WATCHDOG_ON_BOOT<br> select HAVE_SMI_HANDLER<br> select COMMON_FADT<br>- select SPI_FLASH<br> select SOUTHBRIDGE_INTEL_COMMON_GPIO<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_SPI<br> <br> if SOUTHBRIDGE_INTEL_I82801GX<br> <br>diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc<br>index 5b3ba6a..bb68d93 100644<br>--- a/src/southbridge/intel/i82801gx/Makefile.inc<br>+++ b/src/southbridge/intel/i82801gx/Makefile.inc<br>@@ -27,7 +27,6 @@<br> ramstage-y += smbus.c<br> ramstage-y += usb.c<br> ramstage-y += usb_ehci.c<br>-ramstage-y += ../common/spi.c<br> <br> ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c<br> <br>diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig<br>index 4b78118..60af933 100644<br>--- a/src/southbridge/intel/ibexpeak/Kconfig<br>+++ b/src/southbridge/intel/ibexpeak/Kconfig<br>@@ -28,9 +28,9 @@<br> select USE_WATCHDOG_ON_BOOT<br> select PCIEXP_ASPM<br> select PCIEXP_COMMON_CLOCK<br>- select SPI_FLASH<br> select SOUTHBRIDGE_INTEL_COMMON<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_SPI<br> select HAVE_USBDEBUG_OPTIONS<br> select COMMON_FADT<br> select ACPI_SATA_GENERATOR<br>diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc<br>index 41d3afb..7714f95 100644<br>--- a/src/southbridge/intel/ibexpeak/Makefile.inc<br>+++ b/src/southbridge/intel/ibexpeak/Makefile.inc<br>@@ -35,9 +35,7 @@<br> ramstage-y += ../bd82x6x/watchdog.c<br> <br> ramstage-$(CONFIG_ELOG) += ../bd82x6x/elog.c<br>-ramstage-y += ../common/spi.c<br> ramstage-y += madt.c<br>-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c<br> <br> ramstage-y += smi.c<br> smm-y += smihandler.c me.c ../bd82x6x/me_8.x.c ../bd82x6x/finalize.c ../bd82x6x/pch.c<br>diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig<br>index 646d480..8d5cbbf 100644<br>--- a/src/southbridge/intel/lynxpoint/Kconfig<br>+++ b/src/southbridge/intel/lynxpoint/Kconfig<br>@@ -23,13 +23,13 @@<br> select ACPI_INTEL_HARDWARE_SLEEP_VALUES<br> select SOUTHBRIDGE_INTEL_COMMON<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_SPI<br> select IOAPIC<br> select HAVE_HARD_RESET<br> select HAVE_USBDEBUG_OPTIONS<br> select USE_WATCHDOG_ON_BOOT<br> select PCIEXP_ASPM<br> select PCIEXP_COMMON_CLOCK<br>- select SPI_FLASH<br> select HAVE_INTEL_FIRMWARE<br> select HAVE_SPI_CONSOLE_SUPPORT<br> select RTC<br>diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc<br>index 3b1ce5a..6abdf4d 100644<br>--- a/src/southbridge/intel/lynxpoint/Makefile.inc<br>+++ b/src/southbridge/intel/lynxpoint/Makefile.inc<br>@@ -41,8 +41,6 @@<br> ramstage-y += acpi.c<br> <br> ramstage-$(CONFIG_ELOG) += elog.c<br>-ramstage-y += ../common/spi.c<br>-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c<br> <br> ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c pmutil.c<br> smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c pch.c<br></pre><p>To view, visit <a href="https://review.coreboot.org/21674">change 21674</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21674"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I970408e5656c0e8812b8609e2cc10d0bc8d8f6f2 </div>
<div style="display:none"> Gerrit-Change-Number: 21674 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>