<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21613">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Move AmdInitEnv to ramstage<br><br>Relocate the call to AGESA in preparation for implementing postcar.<br>This change should have no net effect as long as the ordering is<br>maintained and AmdInitEnv stays later than CAR teardown.<br><br>BUG=b:66196801<br><br>Change-Id: I0e4a5fd979b06cf50907c62d51e55db63c5e00c5<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/stoneyridge/chip.c<br>M src/soc/amd/stoneyridge/romstage.c<br>2 files changed, 12 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/21613/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c<br>index 325d2ea..c230fe7 100644<br>--- a/src/soc/amd/stoneyridge/chip.c<br>+++ b/src/soc/amd/stoneyridge/chip.c<br>@@ -14,6 +14,8 @@<br>  */<br> <br> #include <chip.h><br>+#include <bootstate.h><br>+#include <console/console.h><br> #include <cpu/amd/mtrr.h><br> #include <cpu/cpu.h><br> #include <device/device.h><br>@@ -21,6 +23,8 @@<br> #include <soc/cpu.h><br> #include <soc/northbridge.h><br> #include <soc/southbridge.h><br>+#include <agesawrapper.h><br>+#include <agesawrapper_call.h><br> <br> struct device_operations cpu_bus_ops = {<br>      .read_resources   = DEVICE_NOOP,<br>@@ -75,3 +79,11 @@<br>  .init = &soc_init,<br>        .final = &soc_final<br> };<br>+<br>+static void do_initenv(void *unused)<br>+{<br>+   post_code(0x46);<br>+     AGESAWRAPPER(amdinitenv);<br>+}<br>+<br>+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, do_initenv, NULL);<br>diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c<br>index 4104f53..00e4b2d 100644<br>--- a/src/soc/amd/stoneyridge/romstage.c<br>+++ b/src/soc/amd/stoneyridge/romstage.c<br>@@ -77,9 +77,6 @@<br>    */<br>   chipset_teardown_car();<br> <br>-   post_code(0x44);<br>-     AGESAWRAPPER(amdinitenv);<br>-<br>  post_code(0x50);<br>      run_ramstage();<br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/21613">change 21613</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21613"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0e4a5fd979b06cf50907c62d51e55db63c5e00c5 </div>
<div style="display:none"> Gerrit-Change-Number: 21613 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>