<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21594">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Put S5-S0 AGESA heap into cbmem<br><br>Now that soc/amd supports EARLY_CBMEM_INIT, put the HEAP into cbmem,<br>allowing better control of its cacheability in subsequent patches.<br>This relocates the heap initialization from the common directory into<br>stoneyridge (i.e. now expected to be non-generic), and places it later<br>than cbmem initialization.  The conversion relies on cbmem_add() first<br>searching cbmem for the ID before adding a new entry.<br><br>Change-Id: I9ff35eefb2a68879ff44c6e29f58635831b19848<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/common/agesawrapper.c<br>M src/soc/amd/common/heapmanager.c<br>M src/soc/amd/stoneyridge/romstage.c<br>3 files changed, 5 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/21594/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/common/agesawrapper.c b/src/soc/amd/common/agesawrapper.c<br>index 3ad4871..eea0ddc 100644<br>--- a/src/soc/amd/common/agesawrapper.c<br>+++ b/src/soc/amd/common/agesawrapper.c<br>@@ -174,8 +174,6 @@<br> <br>        if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(PostParams->StdHeader.HeapStatus);<br>       AmdReleaseStruct (&AmdParamStruct);<br>-      /* Initialize heap space */<br>-  EmptyHeap();<br> <br>       return status;<br> }<br>diff --git a/src/soc/amd/common/heapmanager.c b/src/soc/amd/common/heapmanager.c<br>index 902fb15..58b072b 100644<br>--- a/src/soc/amd/common/heapmanager.c<br>+++ b/src/soc/amd/common/heapmanager.c<br>@@ -22,12 +22,7 @@<br> <br> void *GetHeapBase(AMD_CONFIG_PARAMS *StdHeader)<br> {<br>-     void *heap = (void *)BIOS_HEAP_START_ADDRESS;<br>-<br>-     if (acpi_is_wakeup_s3())<br>-             heap = cbmem_find(CBMEM_ID_RESUME_SCRATCH);<br>-<br>-       return heap;<br>+ return cbmem_add(CBMEM_ID_RESUME_SCRATCH, BIOS_HEAP_SIZE);<br> }<br> <br> void EmptyHeap(void)<br>diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c<br>index da1d4b9..5ed02bb 100644<br>--- a/src/soc/amd/stoneyridge/romstage.c<br>+++ b/src/soc/amd/stoneyridge/romstage.c<br>@@ -24,6 +24,7 @@<br> #include <soc/northbridge.h><br> #include <soc/southbridge.h><br> #include <amdblocks/psp.h><br>+#include <BiosCallOuts.h><br> <br> asmlinkage void car_stage_entry(void)<br> {<br>@@ -70,6 +71,9 @@<br>         post_code(0x43);<br>      cbmem_initialize_empty();<br> <br>+ /* Establish AGESA's heap. */<br>+    EmptyHeap();<br>+<br>       /*<br>     * This writes contents to DRAM backing before teardown.<br>       * todo: move CAR teardown to postcar implementation and<br></pre><p>To view, visit <a href="https://review.coreboot.org/21594">change 21594</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21594"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I9ff35eefb2a68879ff44c6e29f58635831b19848 </div>
<div style="display:none"> Gerrit-Change-Number: 21594 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>