<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21588">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[NEEDSTEST] soc/intel/skylake: Generate ACPI DMAR table<br><br>Change-Id: I8176401dd19aee7ad09a8a145b7a3801fe5b2ae1<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M src/soc/intel/skylake/acpi.c<br>M src/soc/intel/skylake/chip.c<br>M src/soc/intel/skylake/include/soc/acpi.h<br>M src/soc/intel/skylake/include/soc/p2sb.h<br>4 files changed, 76 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/21588/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c<br>index cfb98cd..9ebf5fa 100644<br>--- a/src/soc/intel/skylake/acpi.c<br>+++ b/src/soc/intel/skylake/acpi.c<br>@@ -31,12 +31,14 @@<br> #include <cpu/intel/turbo.h><br> #include <ec/google/chromeec/ec.h><br> #include <intelblocks/cpulib.h><br>+#include <intelblocks/systemagent.h><br> #include <soc/intel/common/acpi.h><br> #include <soc/acpi.h><br> #include <soc/cpu.h><br> #include <soc/iomap.h><br> #include <soc/lpc.h><br> #include <soc/msr.h><br>+#include <soc/p2sb.h><br> #include <soc/pci_devs.h><br> #include <soc/pm.h><br> #include <soc/ramstage.h><br>@@ -534,6 +536,73 @@<br> }<br> }<br> <br>+static unsigned long acpi_fill_dmar(unsigned long current)<br>+{<br>+ struct device *const igfx_dev = dev_find_slot(0, SA_DEVFN_IGD);<br>+ const u32 gfx_vtbar = MCHBAR32(0x5400) & ~0xfff;<br>+<br>+ /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */<br>+ if (igfx_dev && igfx_dev->enabled && gfx_vtbar && !MCHBAR32(0x5404)) {<br>+ const unsigned long tmp = current;<br>+<br>+ current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);<br>+ current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);<br>+ current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 1);<br>+<br>+ acpi_dmar_drhd_fixup(tmp, current);<br>+ }<br>+<br>+ struct device *const p2sb_dev = dev_find_slot(0, PCH_DEVFN_P2SB);<br>+ const u32 vtvc0bar = MCHBAR32(0x5410) & ~0xfff;<br>+<br>+ /* General VTBAR has to be set and in 32-bit space. */<br>+ if (p2sb_dev && vtvc0bar && !MCHBAR32(0x5414)) {<br>+ const unsigned long tmp = current;<br>+<br>+ /* P2SB may already be hidden. There's no clear rule, when. */<br>+ const u8 p2sb_hidden =<br>+ pci_read_config8(p2sb_dev, PCH_P2SB_E0 + 1);<br>+ pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, 0);<br>+<br>+ const u16 ibdf = pci_read_config16(p2sb_dev, PCH_P2SB_IBDF);<br>+ const u16 hbdf = pci_read_config16(p2sb_dev, PCH_P2SB_HBDF);<br>+<br>+ pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, p2sb_hidden);<br>+<br>+ current += acpi_create_dmar_drhd(current,<br>+ DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);<br>+ current += acpi_create_dmar_drhd_ds_ioapic(current,<br>+ 2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf));<br>+ current += acpi_create_dmar_drhd_ds_msi_hpet(current,<br>+ 0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf));<br>+<br>+ acpi_dmar_drhd_fixup(tmp, current);<br>+ }<br>+<br>+ return current;<br>+}<br>+<br>+unsigned long northcluster_write_acpi_tables(struct device *const dev,<br>+ unsigned long current,<br>+ struct acpi_rsdp *const rsdp)<br>+{<br>+ acpi_dmar_t *const dmar = (acpi_dmar_t *)current;<br>+ struct device *const root_dev = dev_find_slot(0, SA_DEVFN_ROOT);<br>+<br>+ /* Create DMAR table only if we have VT-d capability. */<br>+ if (!root_dev || pci_read_config32(root_dev, 0xe4) & 1 << 23)<br>+ return current;<br>+<br>+ printk(BIOS_DEBUG, "ACPI: * DMAR\n");<br>+ acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar);<br>+ current += dmar->header.length;<br>+ current = acpi_align_current(current);<br>+ acpi_add_table(rsdp, dmar);<br>+ current = acpi_align_current(current);<br>+<br>+ return current;<br>+}<br>+<br> unsigned long acpi_madt_irq_overrides(unsigned long current)<br> {<br> int sci = acpi_sci_irq();<br>diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c<br>index 7014c24..a52c9aa 100644<br>--- a/src/soc/intel/skylake/chip.c<br>+++ b/src/soc/intel/skylake/chip.c<br>@@ -49,7 +49,8 @@<br> .scan_bus = &pci_domain_scan_bus,<br> .ops_pci_bus = &pci_bus_default_ops,<br> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)<br>- .acpi_name = &soc_acpi_name,<br>+ .write_acpi_tables = &northcluster_write_acpi_tables,<br>+ .acpi_name = &soc_acpi_name,<br> #endif<br> };<br> <br>diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h<br>index 94c7c2f..e3da126 100644<br>--- a/src/soc/intel/skylake/include/soc/acpi.h<br>+++ b/src/soc/intel/skylake/include/soc/acpi.h<br>@@ -32,5 +32,7 @@<br> void southcluster_inject_dsdt(device_t device);<br> unsigned long southcluster_write_acpi_tables(device_t device,<br> unsigned long current, struct acpi_rsdp *rsdp);<br>+unsigned long northcluster_write_acpi_tables(struct device *,<br>+ unsigned long current, struct acpi_rsdp *);<br> <br> #endif /* _SOC_ACPI_H_ */<br>diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h<br>index d846dfc..09e73fc 100644<br>--- a/src/soc/intel/skylake/include/soc/p2sb.h<br>+++ b/src/soc/intel/skylake/include/soc/p2sb.h<br>@@ -19,6 +19,9 @@<br> #define HPTC_OFFSET 0x60<br> #define HPTC_ADDR_ENABLE_BIT (1 << 7)<br> <br>+#define PCH_P2SB_IBDF 0x6c<br>+#define PCH_P2SB_HBDF 0x70<br>+<br> #define PCH_P2SB_EPMASK0 0xB0<br> #define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4))<br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/21588">change 21588</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21588"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I8176401dd19aee7ad09a8a145b7a3801fe5b2ae1 </div>
<div style="display:none"> Gerrit-Change-Number: 21588 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>