<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21494">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Simplify SB link routing<br><br>Remove the check for the southbridge link from Stoney Ridge.  The APU<br>is an SoC which can never be installed in a multi-node system.  It is<br>pointless to detect and remember the sblink value, which is set by<br>hardware and comes up 0.  The BKDG marks this as a reserved field vs.<br>documentation for multi-node-capable Family 15h devices.<br><br>Because there is only one option for SB link now, relocate the register<br>write done by set_vga_enable_reg() and remove the function.<br><br>Change-Id: Ie4ce6b5aa847a184534224db302437ff8d37c14b<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/stoneyridge/northbridge.c<br>1 file changed, 2 insertions(+), 18 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/21494/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c<br>index eacd82e..8e3c13c 100644<br>--- a/src/soc/amd/stoneyridge/northbridge.c<br>+++ b/src/soc/amd/stoneyridge/northbridge.c<br>@@ -58,7 +58,6 @@<br> } dram_base_mask_t;<br> <br> static unsigned int node_nums;<br>-static unsigned int sblink;<br> static device_t __f0_dev;<br> static device_t __f1_dev;<br> static device_t __f2_dev;<br>@@ -143,18 +142,6 @@<br>     pci_write_config32(__f1_dev, reg, value);<br> }<br> <br>-static void set_vga_enable_reg(u32 nodeid, u32 linkn)<br>-{<br>- u32 val;<br>-<br>-  val =  1 | (nodeid << 4) | (linkn << 12);<br>-        /* Routes:<br>-    * mmio 0xa0000:0xbffff<br>-       * io   0x3b0:0x3bb, 0x3c0:0x3df<br>-      */<br>-  f1_write_config32(0xf4, val);<br>-}<br>-<br> static void read_resources(device_t dev)<br> {<br>   /*<br>@@ -228,9 +215,8 @@<br>       if (link == NULL)<br>             return;<br> <br>-   printk(BIOS_DEBUG, "VGA: %s link %d has VGA device\n",<br>-                                             dev_path(dev), sblink);<br>-      set_vga_enable_reg(0, sblink);<br>+       printk(BIOS_DEBUG, "VGA: %s has VGA device\n",        dev_path(dev));<br>+      f1_write_config32(0xf4, 1); /* Route A0000-BFFFF, IO 3B0-3BB 3C0-3DF */<br> }<br> <br> static void set_resources(device_t dev)<br>@@ -605,8 +591,6 @@<br> /*  first node */<br> static void sysconf_init(device_t dev)<br> {<br>-       /* don't forget sublink1 */<br>-      sblink = (pci_read_config32(dev, 0x64) >> 8) & 7;<br>   /* NodeCnt[2:0] */<br>    node_nums = ((pci_read_config32(dev, 0x60) >> 4) & 7) + 1;<br> }<br></pre><p>To view, visit <a href="https://review.coreboot.org/21494">change 21494</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21494"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie4ce6b5aa847a184534224db302437ff8d37c14b </div>
<div style="display:none"> Gerrit-Change-Number: 21494 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>