<p>Nathaniel Roach has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21465">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/bd82x6x: Add Timestamp around ME DRAM update<br><br>Add a timestamp before and after waiting for the ME<br>to acknowledge the DRAM being ready.<br><br>This allows easier debugging during use of me_cleaner<br>and/or alternate ME images.<br><br>Change-Id: Ie228e12a75d373b4f406b3595e1fb1aab41aa5df<br>Signed-off-by: Nathaniel Roach <nroach44@gmail.com><br>---<br>M src/commonlib/include/commonlib/timestamp_serialized.h<br>M src/southbridge/intel/bd82x6x/early_me.c<br>2 files changed, 11 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/21465/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h<br>index 60feffe..d9784d1 100644<br>--- a/src/commonlib/include/commonlib/timestamp_serialized.h<br>+++ b/src/commonlib/include/commonlib/timestamp_serialized.h<br>@@ -77,6 +77,10 @@<br>   TS_END_COPYVPD_RO = 551,<br>      TS_END_COPYVPD_RW = 552,<br> <br>+  /* 940-950 reserved for vendorcode extensions (940-950: intel/ME) */<br>+ TS_ME_INFORM_DRAM_WAIT = 940,<br>+        TS_ME_INFORM_DRAM_DONE = 941,<br>+        <br>      /* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */<br>    TS_FSP_MEMORY_INIT_START = 950,<br>       TS_FSP_MEMORY_INIT_END = 951,<br>@@ -177,6 +181,10 @@<br>   { TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" },<br>    { TS_START_KERNEL,      "jumping to kernel" },<br> <br>+  /* Intel ME related timestamps */<br>+    { TS_ME_INFORM_DRAM_WAIT,       "waiting for ME acknowledgement of raminit"},<br>+      { TS_ME_INFORM_DRAM_DONE,       "finished waiting for ME response"},<br>+<br>     /* FSP related timestamps */<br>  { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },<br>      { TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" },<br>diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c<br>index 607cd14..b2e9200 100644<br>--- a/src/southbridge/intel/bd82x6x/early_me.c<br>+++ b/src/southbridge/intel/bd82x6x/early_me.c<br>@@ -20,6 +20,7 @@<br> #include <device/pci_ids.h><br> #include <halt.h><br> #include <string.h><br>+#include <timestamp.h><br> #include "me.h"<br> #include "pch.h"<br> <br>@@ -190,6 +191,7 @@<br>   meDID = did.uma_base | (1 << 28);// | (1 << 23);<br>  pci_write_config32(PCI_DEV(0, 0x16, 0), PCI_ME_H_GS, meDID);<br> <br>+      timestamp_add_now(TS_ME_INFORM_DRAM_WAIT);<br>    udelay(1100);<br> <br>      /* Must wait for ME acknowledgement */<br>@@ -200,6 +202,7 @@<br>           hfs = (pci_read_config32(PCI_DEV(0, 0x16, 0), PCI_ME_HFS) & 0xfe000000) >> 24;<br>              millisec++;<br>   }<br>+    timestamp_add_now(TS_ME_INFORM_DRAM_DONE);<br> <br>         me_fws2 = pci_read_config32(PCI_DEV(0, 0x16, 0), 0x48);<br>       printk(BIOS_NOTICE, "ME: FWS2: 0x%x\n", me_fws2);<br></pre><p>To view, visit <a href="https://review.coreboot.org/21465">change 21465</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21465"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie228e12a75d373b4f406b3595e1fb1aab41aa5df </div>
<div style="display:none"> Gerrit-Change-Number: 21465 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nathaniel Roach <nroach44@gmail.com> </div>