<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21433">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/block: Update common rtc code<br><br>Move rtc init code into common area and update the implementation for<br>apollolake to avoid build break.<br><br>Change-Id: I702ce0efba25cb6fde33cc15698ae44312742367<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/apollolake/lpc.c<br>M src/soc/intel/common/block/include/intelblocks/rtc.h<br>M src/soc/intel/common/block/rtc/Makefile.inc<br>M src/soc/intel/common/block/rtc/rtc.c<br>4 files changed, 32 insertions(+), 11 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/21433/8</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c<br>index 6c7ffff..0cd58de 100644<br>--- a/src/soc/intel/apollolake/lpc.c<br>+++ b/src/soc/intel/apollolake/lpc.c<br>@@ -83,23 +83,16 @@<br> gpio_configure_pads(lpc_gpios, ARRAY_SIZE(lpc_gpios));<br> }<br> <br>-static void rtc_init(void)<br>+int soc_get_rtc_failed(void)<br> {<br>- int rtc_fail;<br> const struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);<br> <br> if (!ps) {<br> printk(BIOS_ERR, "Could not find power state in cbmem, RTC init aborted\n");<br>- return;<br>+ return 1;<br> }<br> <br>- rtc_fail = !!(ps->gen_pmcon1 & RPS);<br>- /* Ensure the date is set including century byte. */<br>- cmos_check_update_date();<br>- if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))<br>- init_vbnv_cmos(rtc_fail);<br>- else<br>- cmos_init(rtc_fail);<br>+ return !!(ps->gen_pmcon1 & RPS);<br> }<br> <br> void lpc_init(struct device *dev)<br>diff --git a/src/soc/intel/common/block/include/intelblocks/rtc.h b/src/soc/intel/common/block/include/intelblocks/rtc.h<br>index 1556026..c6507c8 100644<br>--- a/src/soc/intel/common/block/include/intelblocks/rtc.h<br>+++ b/src/soc/intel/common/block/include/intelblocks/rtc.h<br>@@ -18,4 +18,9 @@<br> <br> void enable_rtc_upper_bank(void);<br> <br>+/* Expect return rtc failed bootlean in case of coin removal */<br>+int soc_get_rtc_failed(void);<br>+<br>+void rtc_init(void);<br>+<br> #endif /* SOC_INTEL_COMMON_BLOCK_RTC_H */<br>diff --git a/src/soc/intel/common/block/rtc/Makefile.inc b/src/soc/intel/common/block/rtc/Makefile.inc<br>index 2d2d4e3..95f6659 100644<br>--- a/src/soc/intel/common/block/rtc/Makefile.inc<br>+++ b/src/soc/intel/common/block/rtc/Makefile.inc<br>@@ -1 +1,3 @@<br> bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c<br>+<br>+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c<br>diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c<br>index ea99870..04c0768 100644<br>--- a/src/soc/intel/common/block/rtc/rtc.c<br>+++ b/src/soc/intel/common/block/rtc/rtc.c<br>@@ -13,9 +13,11 @@<br> * GNU General Public License for more details.<br> */<br> <br>-#include <soc/pcr_ids.h><br> #include <intelblocks/pcr.h><br> #include <intelblocks/rtc.h><br>+#include <soc/pcr_ids.h><br>+#include <pc80/mc146818rtc.h><br>+#include <vboot/vbnv.h><br> <br> /* RTC PCR configuration */<br> #define PCR_RTC_CONF 0x3400<br>@@ -29,3 +31,22 @@<br> /* Enable upper 128 bytes of CMOS */<br> pcr_or32(PID_RTC, PCR_RTC_CONF, PCR_RTC_CONF_UCMOS_EN);<br> }<br>+<br>+__attribute__((weak)) int soc_get_rtc_failed(void)<br>+{<br>+ return 0;<br>+}<br>+<br>+void rtc_init(void)<br>+{<br>+ int rtc_failed;<br>+<br>+ rtc_failed = soc_get_rtc_failed();<br>+ /* Ensure the date is set including century byte. */<br>+ cmos_check_update_date();<br>+<br>+ if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))<br>+ init_vbnv_cmos(rtc_failed);<br>+ else<br>+ cmos_init(rtc_failed);<br>+}<br></pre><p>To view, visit <a href="https://review.coreboot.org/21433">change 21433</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21433"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I702ce0efba25cb6fde33cc15698ae44312742367 </div>
<div style="display:none"> Gerrit-Change-Number: 21433 </div>
<div style="display:none"> Gerrit-PatchSet: 8 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Andrex Andraos <andrex.andraos@intel.corp-partner.google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Bora Guvendik <bora.guvendik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Hannah Williams <hannah.williams@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: John Zhao <john.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> </div>
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