<p>Philipp Ammann has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21422">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/intel/d525mw: SuperIO is W83627DHG<br><br>Replace W83627THG includes from the D510MO with D83627DHG.<br><br>Change-Id: I6c80878966193011ac30dfb8d4fadf3318285058<br>Signed-off-by: Philipp Ammann <trilean@users.noreply.github.com><br>---<br>M src/mainboard/intel/d525mw/Kconfig<br>M src/mainboard/intel/d525mw/devicetree.cb<br>M src/mainboard/intel/d525mw/romstage.c<br>3 files changed, 4 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/21422/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/intel/d525mw/Kconfig b/src/mainboard/intel/d525mw/Kconfig<br>index 4f3c998..b73fa5f 100644<br>--- a/src/mainboard/intel/d525mw/Kconfig<br>+++ b/src/mainboard/intel/d525mw/Kconfig<br>@@ -20,7 +20,7 @@<br>  select CPU_INTEL_SOCKET_FCBGA559<br>      select NORTHBRIDGE_INTEL_PINEVIEW<br>     select SOUTHBRIDGE_INTEL_I82801GX<br>-    select SUPERIO_WINBOND_W83627THG<br>+     select SUPERIO_WINBOND_W83627DHG<br>      select HAVE_ACPI_TABLES<br>       select HAVE_ACPI_RESUME<br>       select BOARD_ROMSIZE_KB_1024<br>diff --git a/src/mainboard/intel/d525mw/devicetree.cb b/src/mainboard/intel/d525mw/devicetree.cb<br>index c5b885f..29343e0 100644<br>--- a/src/mainboard/intel/d525mw/devicetree.cb<br>+++ b/src/mainboard/intel/d525mw/devicetree.cb<br>@@ -56,7 +56,7 @@<br>       device pci 1d.7 on end         # USB<br>       device pci 1e.0 on end            # PCI bridge<br>       device pci 1f.0 on         # ISA bridge<br>-        chip superio/winbond/w83627thg   # Super I/O<br>+        chip superio/winbond/w83627dhg    # Super I/O<br>           device pnp 4e.0 off end # Floppy<br>           device pnp 4e.1 on         # Parallel port<br>             io 0x60 = 0x378<br>diff --git a/src/mainboard/intel/d525mw/romstage.c b/src/mainboard/intel/d525mw/romstage.c<br>index 44f203f..3ef23c5 100644<br>--- a/src/mainboard/intel/d525mw/romstage.c<br>+++ b/src/mainboard/intel/d525mw/romstage.c<br>@@ -27,7 +27,7 @@<br> #include <cpu/x86/bist.h><br> #include <cpu/intel/romstage.h><br> #include <cpu/x86/lapic.h><br>-#include <superio/winbond/w83627thg/w83627thg.h><br>+#include <superio/winbond/w83627dhg/w83627dhg.h><br> #include <superio/winbond/common/winbond.h><br> #include <lib.h><br> #include <arch/stages.h><br>@@ -35,7 +35,7 @@<br> #include <romstage_handoff.h><br> #include <timestamp.h><br> <br>-#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1)<br>+#define SERIAL_DEV PNP_DEV(0x4e, W83627DHG_SP1)<br> #define SUPERIO_DEV PNP_DEV(0x4e, 0)<br> <br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/21422">change 21422</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21422"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6c80878966193011ac30dfb8d4fadf3318285058 </div>
<div style="display:none"> Gerrit-Change-Number: 21422 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Philipp Ammann </div>