<p>Pratikkumar V Prajapati has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21339">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[WIP]src/soc/intel/cannonlake: Define USB AFE params<br><br>Change-Id: I42243950366d672e886158eb1934350f47b4ff1f<br>Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com><br>---<br>M src/soc/intel/cannonlake/include/soc/usb.h<br>1 file changed, 49 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/21339/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/cannonlake/include/soc/usb.h b/src/soc/intel/cannonlake/include/soc/usb.h<br>index eac017e..c02949f 100644<br>--- a/src/soc/intel/cannonlake/include/soc/usb.h<br>+++ b/src/soc/intel/cannonlake/include/soc/usb.h<br>@@ -19,6 +19,25 @@<br> <br> #include <stdint.h><br> <br>+/* Per Port HS Transmitter Emphasis */<br>+#define USB2_EMP_OFF                        0<br>+#define USB2_DE_EMP_ON                      1<br>+#define USB2_PRE_EMP_ON                     2<br>+#define USB2_DE_EMP_ON_PRE_EMP_ON   3<br>+<br>+/* Per Port Half Bit Pre-emphasis */<br>+#define USB2_FULL_BIT_PRE_EMP     0<br>+#define USB2_HALF_BIT_PRE_EMP       1<br>+<br>+/* Per Port HS Preemphasis Bias */<br>+#define USB2_BIAS_0MV               0<br>+#define USB2_BIAS_11P25MV   1<br>+#define USB2_BIAS_16P9MV    2<br>+#define USB2_BIAS_28P15MV   3<br>+#define USB2_BIAS_39P35MV   5<br>+#define USB2_BIAS_45MV              6<br>+#define USB2_BIAS_56P3MV    7<br>+<br> struct usb2_port_config {<br>      uint8_t enable;<br>       uint8_t ocpin;<br>@@ -28,6 +47,29 @@<br>    uint8_t pre_emp_bit;<br> };<br> <br>+/* USB Overcurrent pins definition */<br>+enum {<br>+        OC0 = 0,<br>+     OC1,<br>+ OC2,<br>+ OC3,<br>+ OC4,<br>+ OC5,<br>+ OC6,<br>+ OC7,<br>+ OCMAX,<br>+       OC_SKIP = 0xff, /* Skip OC programming */<br>+};<br>+<br>+#define USB2_PORT_EMPTY { \<br>+      .enable        = 0, \<br>+        .ocpin         = OC_SKIP, \<br>+  .tx_bias       = USB2_BIAS_0MV, \<br>+    .tx_emp_enable = USB2_EMP_OFF, \<br>+     .pre_emp_bias  = USB2_BIAS_0MV, \<br>+    .pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \<br>+}<br>+<br> struct usb3_port_config {<br>  uint8_t enable;<br>       uint8_t ocpin;<br>@@ -35,4 +77,11 @@<br>    uint8_t tx_downscale_amp;<br> };<br> <br>+#define USB3_PORT_EMPTY { \<br>+      .enable           = 0, \<br>+     .ocpin            = OC_SKIP, \<br>+       .tx_de_emp        = 0x00, \<br>+  .tx_downscale_amp = 0x00, \<br>+}<br>+<br> #endif<br></pre><p>To view, visit <a href="https://review.coreboot.org/21339">change 21339</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21339"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I42243950366d672e886158eb1934350f47b4ff1f </div>
<div style="display:none"> Gerrit-Change-Number: 21339 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> </div>