<p>Julius Werner would like Lin Huang, David Schneider and Philip Chen to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/21328">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/gru: Re-enable 3V rail GPIO on Scarlet<br><br>We've decided to move control for the 3.0V rail (technically 3.3V on<br>Scarlet, but who cares about millivolts) back to a GPIO on the AP for<br>Scarlet rev2. This patch adds the necessary code to enable it and make<br>ARM TF aware of its existence. Since the pin had previously not been<br>connected to anything, we shouldn't really need to guard this by board<br>ID... older Scarlets will just be twiddling an empty pin.<br><br>Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459<br>Signed-off-by: Julius Werner <jwerner@chromium.org><br>---<br>M src/mainboard/google/gru/board.h<br>M src/mainboard/google/gru/bootblock.c<br>M src/mainboard/google/gru/mainboard.c<br>3 files changed, 23 insertions(+), 34 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/21328/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/google/gru/board.h b/src/mainboard/google/gru/board.h<br>index cc7581d..7237d46 100644<br>--- a/src/mainboard/google/gru/board.h<br>+++ b/src/mainboard/google/gru/board.h<br>@@ -30,7 +30,7 @@<br> #define GPIO_EC_IRQ GPIO(1, C, 2)<br> #define GPIO_P15V_EN dead_code_t(gpio_t, "PP1500 doesn't exist on Scarlet")<br> #define GPIO_P18V_AUDIO_PWREN dead_code_t(gpio_t, "doesn't exist on Scarlet")<br>-#define GPIO_P30V_EN dead_code_t(gpio_t, "PP3000 doesn't exist on Scarlet")<br>+#define GPIO_P30V_EN GPIO(0, B, 1)<br> #define GPIO_TP_RST_L dead_code_t(gpio_t, "don't need TP_RST_L on Scarlet")<br> #define GPIO_TPM_IRQ GPIO(1, C, 1)<br> #define GPIO_WP GPIO(0, B, 5)<br>diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c<br>index 01aa4bf..a3d3121 100644<br>--- a/src/mainboard/google/gru/bootblock.c<br>+++ b/src/mainboard/google/gru/bootblock.c<br>@@ -48,12 +48,10 @@<br> if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))<br> write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 3));<br> <br>- if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {<br>- /* Enable rails powering GPIO blocks, among other things.<br>- These are EC-controlled on Scarlet and already on. */<br>- gpio_output(GPIO_P15V_EN, 1);<br>- gpio_output(GPIO_P30V_EN, 1);<br>- }<br>+ /* Enable rails powering GPIO blocks, among other things. */<br>+ gpio_output(GPIO_P30V_EN, 1);<br>+ if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))<br>+ gpio_output(GPIO_P15V_EN, 1); /* Scarlet: EC-controlled */<br> <br> #if IS_ENABLED(CONFIG_DRIVERS_UART)<br> _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,<br>diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c<br>index df3df4f..38c2646 100644<br>--- a/src/mainboard/google/gru/mainboard.c<br>+++ b/src/mainboard/google/gru/mainboard.c<br>@@ -90,36 +90,27 @@<br> * with highest voltage first.<br> * Since register_bl31() appends to the front of the list, we need to<br> * register them backwards, with 1.5V coming first.<br>+ * 1.5V and 1.8V are EC-controlled on Scarlet, so we skip them.<br> */<br>- static struct bl31_gpio_param param_p15_en = {<br>- .h = {<br>- .type = PARAM_SUSPEND_GPIO,<br>- },<br>- .gpio = {<br>- .polarity = BL31_GPIO_LEVEL_LOW,<br>- },<br>- };<br>- param_p15_en.gpio.index = GPIO_P15V_EN.raw;<br>- register_bl31_param(¶m_p15_en.h);<br>+ if (!CONFIG_BOARD_GOOGLE_SCARLET) {<br>+ static struct bl31_gpio_param param_p15_en = {<br>+ .h = { .type = PARAM_SUSPEND_GPIO },<br>+ .gpio = { .polarity = BL31_GPIO_LEVEL_LOW },<br>+ };<br>+ param_p15_en.gpio.index = GPIO_P15V_EN.raw;<br>+ register_bl31_param(¶m_p15_en.h);<br> <br>- static struct bl31_gpio_param param_p18_audio_en = {<br>- .h = {<br>- .type = PARAM_SUSPEND_GPIO,<br>- },<br>- .gpio = {<br>- .polarity = BL31_GPIO_LEVEL_LOW,<br>- },<br>- };<br>- param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw;<br>- register_bl31_param(¶m_p18_audio_en.h);<br>+ static struct bl31_gpio_param param_p18_audio_en = {<br>+ .h = { .type = PARAM_SUSPEND_GPIO },<br>+ .gpio = { .polarity = BL31_GPIO_LEVEL_LOW },<br>+ };<br>+ param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw;<br>+ register_bl31_param(¶m_p18_audio_en.h);<br>+ }<br> <br> static struct bl31_gpio_param param_p30_en = {<br>- .h = {<br>- .type = PARAM_SUSPEND_GPIO,<br>- },<br>- .gpio = {<br>- .polarity = BL31_GPIO_LEVEL_LOW,<br>- },<br>+ .h = { .type = PARAM_SUSPEND_GPIO },<br>+ .gpio = { .polarity = BL31_GPIO_LEVEL_LOW },<br> };<br> param_p30_en.gpio.index = GPIO_P30V_EN.raw;<br> register_bl31_param(¶m_p30_en.h);<br>@@ -354,8 +345,8 @@<br> if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {<br> configure_touchpad(); /* Scarlet: works differently */<br> setup_usb(1); /* Scarlet: only one USB port */<br>- register_gpio_suspend(); /* Scarlet: all EC-controlled */<br> }<br>+ register_gpio_suspend();<br> register_reset_to_bl31();<br> register_poweroff_to_bl31();<br> register_apio_suspend();<br></pre><p>To view, visit <a href="https://review.coreboot.org/21328">change 21328</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21328"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 </div>
<div style="display:none"> Gerrit-Change-Number: 21328 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julius Werner <jwerner@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: David Schneider <dnschneid@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Lin Huang <hl@rock-chips.com> </div>
<div style="display:none"> Gerrit-Reviewer: Philip Chen <philipchen@chromium.org> </div>