<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21326">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/common: Write MRC cache at exit of BS_DEV_INIT<br><br>We set the SPI lockdown in BS_POST_DEVICE (dev_finalize()) on many plat-<br>forms now. The SPI controller is initialized at start of BS_DEV_INIT<br>(dev_initialize()).<br><br>The SPI lockdown usually shouldn't be a problem but the SPI driver imple-<br>mentation lacks full support for the locked interface. Also, some options<br>exist to lock all flash regions read-only until the next reboot.<br><br>Change-Id: Ifda826ae2bb28adcce8dda8e2bb16dc38fe0fe9e<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M src/northbridge/intel/common/mrc_cache.c<br>1 file changed, 6 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/21326/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/northbridge/intel/common/mrc_cache.c b/src/northbridge/intel/common/mrc_cache.c<br>index 2fc8d96..f692282 100644<br>--- a/src/northbridge/intel/common/mrc_cache.c<br>+++ b/src/northbridge/intel/common/mrc_cache.c<br>@@ -19,6 +19,7 @@<br> #include <console/console.h><br> #include <cbfs.h><br> #include <fmap.h><br>+#include <arch/acpi.h><br> #include <ip_checksum.h><br> #include <device/device.h><br> #include <cbmem.h><br>@@ -162,6 +163,9 @@<br>        int ret;<br>      struct spi_flash flash;<br> <br>+   if (acpi_is_wakeup_s3())<br>+             return;<br>+<br>    if (!current) {<br>               printk(BIOS_ERR, "No MRC cache in cbmem. Can't update flash.\n");<br>               return;<br>@@ -231,7 +235,8 @@<br>          printk(BIOS_DEBUG, "Successfully wrote MRC cache\n");<br> }<br> <br>-BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);<br>+/* Do it before chipset is locked during BS_POST_DEVICE. */<br>+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, update_mrc_cache, NULL);<br> <br> struct mrc_data_container *find_current_mrc_cache(void)<br> {<br></pre><p>To view, visit <a href="https://review.coreboot.org/21326">change 21326</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21326"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ifda826ae2bb28adcce8dda8e2bb16dc38fe0fe9e </div>
<div style="display:none"> Gerrit-Change-Number: 21326 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>