<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21280">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Add Vboot/ChromOS support<br><br>Add Vboot and Chromeos support in SOC Kconfig, include a seperated<br>verstage in Makefiles.inc as well.<br><br>Change-Id: I114a9d6e92b69199ccacc1e7e1535eccc0e2cb99<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/cannonlake/Kconfig<br>M src/soc/intel/cannonlake/Makefile.inc<br>2 files changed, 18 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/21280/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig<br>index ac15742..9c94cbd6 100644<br>--- a/src/soc/intel/cannonlake/Kconfig<br>+++ b/src/soc/intel/cannonlake/Kconfig<br>@@ -119,4 +119,16 @@<br>     hex<br>   default 0xc35<br> <br>+config CHROMEOS<br>+        select CHROMEOS_RAMOOPS_DYNAMIC<br>+<br>+config VBOOT<br>+        select VBOOT_EC_SLOW_UPDATE if VBOOT_EC_SOFTWARE_SYNC<br>+        select VBOOT_SEPARATE_VERSTAGE<br>+        select VBOOT_OPROM_MATTERS<br>+        select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT<br>+        select VBOOT_STARTS_IN_BOOTBLOCK<br>+        select VBOOT_VBNV_CMOS<br>+        select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH<br>+<br> endif<br>diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc<br>index facbd22..000522c 100644<br>--- a/src/soc/intel/cannonlake/Makefile.inc<br>+++ b/src/soc/intel/cannonlake/Makefile.inc<br>@@ -19,6 +19,12 @@<br> bootblock-y += spi.c<br> bootblock-$(CONFIG_UART_DEBUG) += uart.c<br> <br>+verstage-y += gspi.c<br>+verstage-$(CONFIG_UART_DEBUG) += uart.c<br>+verstage-y += pmutil.c<br>+verstage-y += spi.c<br>+<br>+romstage-y += gpio.c<br> romstage-y += gspi.c<br> romstage-y += memmap.c<br> romstage-y += pmutil.c<br></pre><p>To view, visit <a href="https://review.coreboot.org/21280">change 21280</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21280"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I114a9d6e92b69199ccacc1e7e1535eccc0e2cb99 </div>
<div style="display:none"> Gerrit-Change-Number: 21280 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: AndreX Andraos <andrex.andraos@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Bora Guvendik <bora.guvendik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Hannah Williams <hannah.williams@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: John Zhao <john.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>