<p>Pratikkumar V Prajapati has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/21053">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/cannonlake/chip:  Add initial PCI enum support<br><br>Add callbacks for initial PCI devices enumeration.<br><br>Change-Id: Ia8a51973aa2b805d62590114bfc49968244b1668<br>Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com><br>---<br>M src/soc/intel/cannonlake/chip.c<br>1 file changed, 30 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/21053/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c<br>index 2f893e3..62181a3 100644<br>--- a/src/soc/intel/cannonlake/chip.c<br>+++ b/src/soc/intel/cannonlake/chip.c<br>@@ -15,8 +15,8 @@<br> <br> #include <chip.h><br> #include <console/console.h><br>+#include <device/device.h><br> #include <device/pci.h><br>-#include <fsp/api.h><br> #include <fsp/api.h><br> #include <fsp/util.h><br> #include <romstage_handoff.h><br>@@ -29,8 +29,37 @@<br>    fsp_silicon_init(romstage_handoff_is_resume());<br> }<br> <br>+static void pci_domain_set_resources(device_t dev)<br>+{<br>+      assign_resources(dev->link_list);<br>+}<br>+<br>+static struct device_operations pci_domain_ops = {<br>+     .read_resources   = &pci_domain_read_resources,<br>+  .set_resources    = &pci_domain_set_resources,<br>+   .scan_bus         = &pci_domain_scan_bus,<br>+        .ops_pci_bus      = &pci_bus_default_ops,<br>+};<br>+<br>+static struct device_operations cpu_bus_ops = {<br>+      .read_resources   = DEVICE_NOOP,<br>+     .set_resources    = DEVICE_NOOP,<br>+     .enable_resources = DEVICE_NOOP,<br>+     .init             = DEVICE_NOOP,<br>+};<br>+<br>+static void soc_enable(device_t dev)<br>+{<br>+  /* Set the operations if it is a special bus type */<br>+ if (dev->path.type == DEVICE_PATH_DOMAIN)<br>+         dev->ops = &pci_domain_ops;<br>+   else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)<br>+               dev->ops = &cpu_bus_ops;<br>+}<br>+<br> struct chip_operations soc_intel_cannonlake_ops = {<br>  CHIP_NAME("Intel Cannonlake")<br>+      .enable_dev     = &soc_enable,<br>    .init           = &soc_init_pre_device,<br> };<br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/21053">change 21053</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/21053"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia8a51973aa2b805d62590114bfc49968244b1668 </div>
<div style="display:none"> Gerrit-Change-Number: 21053 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> </div>