<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20976">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">cpu/amd/fam10: Reduce headers included in init_cpus.h<br><br>Change-Id: Id91caa7c55367e794802788d9007920817f2d484<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/cpu/amd/family_10h-family_15h/defaults.h<br>M src/cpu/amd/family_10h-family_15h/fidvid.c<br>M src/cpu/amd/family_10h-family_15h/init_cpus.c<br>M src/cpu/amd/family_10h-family_15h/init_cpus.h<br>M src/include/cpu/amd/multicore.h<br>M src/northbridge/amd/amdmct/amddefs.h<br>6 files changed, 13 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/20976/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h<br>index 88950a3..f270510 100644<br>--- a/src/cpu/amd/family_10h-family_15h/defaults.h<br>+++ b/src/cpu/amd/family_10h-family_15h/defaults.h<br>@@ -16,6 +16,7 @@<br> <br> #include <northbridge/amd/amdmct/amddefs.h><br> #include <cpu/amd/mtrr.h><br>+#include <cpu/amd/msr.h><br> <br> /*<br>  * Default MSR and errata settings.<br>diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c<br>index af3a674..81baf5d 100644<br>--- a/src/cpu/amd/family_10h-family_15h/fidvid.c<br>+++ b/src/cpu/amd/family_10h-family_15h/fidvid.c<br>@@ -97,6 +97,7 @@<br> #include <northbridge/amd/amdht/AsPsDefs.h><br> #include <northbridge/amd/amdht/ht_wrapper.h><br> #include <cpu/amd/multicore.h><br>+#include <cpu/x86/lapic.h><br> <br> #include "init_cpus.h"<br> <br>diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c<br>index be4f8d4..3f1e288 100644<br>--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c<br>+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c<br>@@ -26,6 +26,11 @@<br> #include <northbridge/amd/amdht/porting.h><br> #include <northbridge/amd/amdht/h3ncmn.h><br> <br>+#include <cpu/x86/lapic.h><br>+#include <cpu/amd/multicore.h><br>+#include <cpu/amd/msr.h><br>+#include <reset.h><br>+<br> #if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_SB700)<br> #include <southbridge/amd/sb700/sb700.h><br> #endif<br>@@ -35,6 +40,7 @@<br> #endif<br> <br> #include "cpu/amd/car/post_cache_as_ram.c"<br>+#include "defaults.h"<br> <br> #if IS_ENABLED(CONFIG_PCI_IO_CFG_EXT)<br> static void set_EnableCf8ExtCfg(void)<br>diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.h b/src/cpu/amd/family_10h-family_15h/init_cpus.h<br>index 8ca9c8b..6e1806f 100644<br>--- a/src/cpu/amd/family_10h-family_15h/init_cpus.h<br>+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.h<br>@@ -16,17 +16,7 @@<br> #ifndef INIT_CPUS_H<br> #define INIT_CPUS_H<br> <br>-#include <stdlib.h><br>-#include <console/console.h><br>-#include <arch/cpu.h><br>-#include <cpu/x86/lapic.h><br>-#include <cpu/x86/mtrr.h><br>-#include <cpu/amd/msr.h><br>-#include <cpu/amd/multicore.h><br>-#include <reset.h><br> #include <northbridge/amd/amdfam10/raminit.h><br>-#include <northbridge/amd/amdht/porting.h><br>-#include "defaults.h"<br> <br> #define NODE_HT(x) NODE_PCI(x,0)<br> #define NODE_MP(x) NODE_PCI(x,1)<br>diff --git a/src/include/cpu/amd/multicore.h b/src/include/cpu/amd/multicore.h<br>index 0ddf866..b868093 100644<br>--- a/src/include/cpu/amd/multicore.h<br>+++ b/src/include/cpu/amd/multicore.h<br>@@ -16,6 +16,8 @@<br> #ifndef CPU_AMD_QUADCORE_H<br> #define CPU_AMD_QUADCORE_H<br> <br>+#include <stdint.h><br>+<br> u32 read_nb_cfg_54(void);<br> <br> struct node_core_id {<br>diff --git a/src/northbridge/amd/amdmct/amddefs.h b/src/northbridge/amd/amdmct/amddefs.h<br>index 58f43f1..c4b7e6d3 100644<br>--- a/src/northbridge/amd/amdmct/amddefs.h<br>+++ b/src/northbridge/amd/amdmct/amddefs.h<br>@@ -16,6 +16,9 @@<br> #ifndef AMDDEFS_H<br> #define AMDDEFS_H<br> <br>+#include <stdint.h><br>+#include <device/pci.h><br>+<br> /* FIXME: this file should be moved to include/cpu/amd/amddefs.h */<br> <br> /* Public Revisions - USE THESE VERSIONS TO MAKE COMPARE WITH CPULOGICALID RETURN VALUE*/<br></pre><p>To view, visit <a href="https://review.coreboot.org/20976">change 20976</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20976"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id91caa7c55367e794802788d9007920817f2d484 </div>
<div style="display:none"> Gerrit-Change-Number: 20976 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>