<p>Marshall Dawson <strong>uploaded patch set #2</strong> to this change.</p><p><a href="https://review.coreboot.org/20965">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">arch/x86: Make postcar TempRamExit call generic<br><br>Move the FSP-specific call for tearing down cache-as-RAM out of<br>postcar.c and replace it with an empty weak function.<br><br>This patch omits checking if (IS_ENABLED(CONFIG_FSP_CAR)).  The<br>temp_ram_exit.c file with the real fsp_temp_ram_exit() is only built<br>when CONFIG_FSP_CAR is true.<br><br>Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/arch/x86/include/arch/cpu.h<br>M src/arch/x86/postcar.c<br>M src/drivers/intel/fsp2_0/temp_ram_exit.c<br>3 files changed, 16 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/20965/2</pre><p>To view, visit <a href="https://review.coreboot.org/20965">change 20965</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20965"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newpatchset </div>
<div style="display:none"> Gerrit-Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479 </div>
<div style="display:none"> Gerrit-Change-Number: 20965 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>