<p>Duncan Laurie has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20904">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">drivers/i2c: Add driver for rt5663 codec<br><br>This commit adds a new driver for the RT5663 codec to use instead<br>of the generic i2c driver. Since the kernel needs additional<br>driver-specific device properites we need a BIOS driver that can<br>provide those properties.<br><br>The kernel driver devicetree properties for this codec are at:<br>linux/Documentation/devicetree/bindings/sound/rt5663.txt<br><br>This was tested by booting and verifying the generated SSDT<br>contains the expected device properties in _DSD.<br><br>Scope (\_SB.PCI0.I2C4)<br>{<br> Device (RT53)<br> {<br> Name (_HID, "10EC5663")<br> Name (_UID, Zero)<br> Name (_DDN, "Realtek RT5663 Codec")<br> Method (_STA, 0, NotSerialized)<br> {<br> Return (0x0F)<br> }<br> Name (_CRS, ResourceTemplate ()<br> {<br> I2cSerialBus (0x0013, ControllerInitiated, 0x00061A80,<br> AddressingMode7Bit, "\\_SB.PCI0.I2C4",<br> 0x00, ResourceConsumer)<br> GpioInt (Edge, ActiveBoth, Exclusive, PullDefault, 0x0000,<br> "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer)<br> {<br> 0x0051<br> }<br> })<br> Name (_DSD, Package (0x02)<br> {<br> ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301")<br> Package (0x05)<br> {<br> Package (0x02)<br> {<br> "irq-gpios",<br> Package (0x04)<br> {<br> \_SB.PCI0.I2C4.RT53,<br> Zero,<br> Zero,<br> Zero<br> }<br> },<br> Package (0x02)<br> {<br> "realtek,dc_offset_l_manual",<br> 0x00FFD160<br> },<br> Package (0x02)<br> {<br> "realtek,dc_offset_r_manual",<br> 0x00FFD1C0<br> },<br> Package (0x02)<br> {<br> "realtek,dc_offset_l_manual_mic",<br> 0x00FF8A10<br> },<br> Package (0x02)<br> {<br> "realtek,dc_offset_r_manual_mic",<br> 0x00FF8AB0<br> }<br> }<br> })<br> }<br>}<br><br>Change-Id: I3425fcbe13c9a5987fc91086d283a86db55c0819<br>Signed-off-by: Duncan Laurie <dlaurie@chromium.org><br>---<br>A src/drivers/i2c/rt5663/Kconfig<br>A src/drivers/i2c/rt5663/Makefile.inc<br>A src/drivers/i2c/rt5663/chip.h<br>A src/drivers/i2c/rt5663/rt5663.c<br>4 files changed, 145 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/20904/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/drivers/i2c/rt5663/Kconfig b/src/drivers/i2c/rt5663/Kconfig<br>new file mode 100644<br>index 0000000..5110972<br>--- /dev/null<br>+++ b/src/drivers/i2c/rt5663/Kconfig<br>@@ -0,0 +1,4 @@<br>+config DRIVERS_I2C_RT5663<br>+ bool<br>+ default n<br>+ depends on HAVE_ACPI_TABLES<br>diff --git a/src/drivers/i2c/rt5663/Makefile.inc b/src/drivers/i2c/rt5663/Makefile.inc<br>new file mode 100644<br>index 0000000..35c566b<br>--- /dev/null<br>+++ b/src/drivers/i2c/rt5663/Makefile.inc<br>@@ -0,0 +1 @@<br>+ramstage-$(CONFIG_DRIVERS_I2C_RT5663) += rt5663.c<br>diff --git a/src/drivers/i2c/rt5663/chip.h b/src/drivers/i2c/rt5663/chip.h<br>new file mode 100644<br>index 0000000..1b367c9<br>--- /dev/null<br>+++ b/src/drivers/i2c/rt5663/chip.h<br>@@ -0,0 +1,34 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * Copyright 2017 Google Inc.<br>+ *<br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation; version 2 of the License.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+/*<br>+ * Realtek RT5663 audio codec devicetree bindings<br>+ */<br>+struct drivers_i2c_rt5663_config {<br>+ /* I2C Bus Frequency in Hertz (default 400kHz) */<br>+ unsigned int bus_speed;<br>+ /* Identifier for multiple chips */<br>+ unsigned int uid;<br>+<br>+ /* Allow GPIO based interrupt or PIRQ */<br>+ struct acpi_gpio irq_gpio;<br>+ struct acpi_irq irq;<br>+<br>+ /* Manual offset value to compensate DC offset for L/R channels */<br>+ uint32_t dc_offset_l_manual;<br>+ uint32_t dc_offset_r_manual;<br>+ uint32_t dc_offset_l_manual_mic;<br>+ uint32_t dc_offset_r_manual_mic;<br>+};<br>diff --git a/src/drivers/i2c/rt5663/rt5663.c b/src/drivers/i2c/rt5663/rt5663.c<br>new file mode 100644<br>index 0000000..ff8e4a0<br>--- /dev/null<br>+++ b/src/drivers/i2c/rt5663/rt5663.c<br>@@ -0,0 +1,106 @@<br>+/*<br>+ * This file is part of the coreboot project.<br>+ *<br>+ * Copyright 2017 Google Inc.<br>+ *<br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>+ * the Free Software Foundation; version 2 of the License.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+ * GNU General Public License for more details.<br>+ */<br>+<br>+#include <arch/acpi.h><br>+#include <arch/acpi_device.h><br>+#include <arch/acpigen.h><br>+#include <console/console.h><br>+#include <device/i2c.h><br>+#include <device/device.h><br>+#include <device/path.h><br>+#include <stdint.h><br>+#include <string.h><br>+#include "chip.h"<br>+<br>+#define RT5663_ACPI_NAME "RT53"<br>+#define RT5663_ACPI_HID "10EC5663"<br>+<br>+#define RT5663_DP_INT(key, val) \<br>+ acpi_dp_add_integer(dp, "realtek," key, (val))<br>+<br>+static void rt5663_fill_ssdt(struct device *dev)<br>+{<br>+ struct drivers_i2c_rt5663_config *config = dev->chip_info;<br>+ const char *scope = acpi_device_scope(dev);<br>+ struct acpi_i2c i2c = {<br>+ .address = dev->path.i2c.device,<br>+ .mode_10bit = dev->path.i2c.mode_10bit,<br>+ .speed = config->bus_speed ? : I2C_SPEED_FAST,<br>+ .resource = scope,<br>+ };<br>+ struct acpi_dp *dp;<br>+<br>+ if (!dev->enabled || !scope)<br>+ return;<br>+<br>+ /* Device */<br>+ acpigen_write_scope(scope);<br>+ acpigen_write_device(acpi_device_name(dev));<br>+ acpigen_write_name_string("_HID", RT5663_ACPI_HID);<br>+ acpigen_write_name_integer("_UID", config->uid);<br>+ acpigen_write_name_string("_DDN", dev->chip_ops->name);<br>+ acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);<br>+<br>+ /* Resources */<br>+ acpigen_write_name("_CRS");<br>+ acpigen_write_resourcetemplate_header();<br>+ acpi_device_write_i2c(&i2c);<br>+ /* Allow either GpioInt() or Interrupt() */<br>+ if (config->irq_gpio.pin_count)<br>+ acpi_device_write_gpio(&config->irq_gpio);<br>+ else<br>+ acpi_device_write_interrupt(&config->irq);<br>+ acpigen_write_resourcetemplate_footer();<br>+<br>+ /* Device Properties */<br>+ dp = acpi_dp_new_table("_DSD");<br>+ if (config->irq_gpio.pin_count)<br>+ acpi_dp_add_gpio(dp, "irq-gpios", acpi_device_path(dev), 0, 0,<br>+ config->irq_gpio.polarity == ACPI_GPIO_ACTIVE_LOW);<br>+ RT5663_DP_INT("dc_offset_l_manual", config->dc_offset_l_manual);<br>+ RT5663_DP_INT("dc_offset_r_manual", config->dc_offset_r_manual);<br>+ RT5663_DP_INT("dc_offset_l_manual_mic", config->dc_offset_l_manual_mic);<br>+ RT5663_DP_INT("dc_offset_r_manual_mic", config->dc_offset_r_manual_mic);<br>+ acpi_dp_write(dp);<br>+<br>+ acpigen_pop_len(); /* Device */<br>+ acpigen_pop_len(); /* Scope */<br>+<br>+ printk(BIOS_INFO, "%s: %s address 0%xh\n", acpi_device_path(dev),<br>+ dev->chip_ops->name, dev->path.i2c.device);<br>+}<br>+<br>+static const char *rt5663_acpi_name(struct device *dev)<br>+{<br>+ return RT5663_ACPI_NAME;<br>+}<br>+<br>+static struct device_operations rt5663_ops = {<br>+ .read_resources = DEVICE_NOOP,<br>+ .set_resources = DEVICE_NOOP,<br>+ .enable_resources = DEVICE_NOOP,<br>+ .acpi_name = &rt5663_acpi_name,<br>+ .acpi_fill_ssdt_generator = &rt5663_fill_ssdt,<br>+};<br>+<br>+static void rt5663_enable(struct device *dev)<br>+{<br>+ dev->ops = &rt5663_ops;<br>+}<br>+<br>+struct chip_operations drivers_i2c_rt5663_ops = {<br>+ CHIP_NAME("Realtek RT5663 Codec")<br>+ .enable_dev = &rt5663_enable<br>+};<br></pre><p>To view, visit <a href="https://review.coreboot.org/20904">change 20904</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3425fcbe13c9a5987fc91086d283a86db55c0819 </div>
<div style="display:none"> Gerrit-Change-Number: 20904 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Duncan Laurie <dlaurie@chromium.org> </div>