<p>Furquan Shaikh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20885">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/lpss: Add lpss_is_controller_in_reset<br><br>Add new API function lpss_is_controller_in_reset that returns whether<br>the LPSS controller is in reset. Also, add lpss.c to smm stage so that<br>lpss_is_controller_in_reset can be used in smihandler.<br><br>BUG=b:64030366<br><br>Change-Id: I0fe5c2890ee799b08482e487296a483fa8d42461<br>Signed-off-by: Furquan Shaikh <furquan@chromium.org><br>---<br>M src/soc/intel/common/block/include/intelblocks/lpss.h<br>M src/soc/intel/common/block/lpss/Makefile.inc<br>M src/soc/intel/common/block/lpss/lpss.c<br>3 files changed, 15 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/20885/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h<br>index 03a4714..138340d 100644<br>--- a/src/soc/intel/common/block/include/intelblocks/lpss.h<br>+++ b/src/soc/intel/common/block/include/intelblocks/lpss.h<br>@@ -27,4 +27,7 @@<br>  */<br> void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val);<br> <br>+/* Check if controller is in reset. */<br>+bool lpss_is_controller_in_reset(uintptr_t base);<br>+<br> #endif  /* SOC_INTEL_COMMON_BLOCK_LPSS_H */<br>diff --git a/src/soc/intel/common/block/lpss/Makefile.inc b/src/soc/intel/common/block/lpss/Makefile.inc<br>index 50d1c10..6ed654f 100644<br>--- a/src/soc/intel/common/block/lpss/Makefile.inc<br>+++ b/src/soc/intel/common/block/lpss/Makefile.inc<br>@@ -2,3 +2,4 @@<br> romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c<br> verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c<br> ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c<br>+smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c<br>diff --git a/src/soc/intel/common/block/lpss/lpss.c b/src/soc/intel/common/block/lpss/lpss.c<br>index 146fdab..feacef3 100644<br>--- a/src/soc/intel/common/block/lpss/lpss.c<br>+++ b/src/soc/intel/common/block/lpss/lpss.c<br>@@ -39,6 +39,17 @@<br> /* DMA Software Reset Control */<br> #define LPSS_DMA_RST_RELEASE     (1 << 2)<br> <br>+bool lpss_is_controller_in_reset(uintptr_t base)<br>+{<br>+     uint8_t *addr = (void *)base;<br>+        uint32_t val = read32(addr + LPSS_RESET_CTL_REG);<br>+<br>+ if (val == 0xFFFFFFFF)<br>+               return true;<br>+<br>+      return !(val & LPSS_CNT_RST_RELEASE);<br>+}<br>+<br> void lpss_reset_release(uintptr_t base)<br> {<br>        uint8_t *addr = (void *)base;<br></pre><p>To view, visit <a href="https://review.coreboot.org/20885">change 20885</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20885"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0fe5c2890ee799b08482e487296a483fa8d42461 </div>
<div style="display:none"> Gerrit-Change-Number: 20885 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Furquan Shaikh <furquan@google.com> </div>