<p>Mariusz Szafranski has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20861">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/denverton_ns: Add support for Denverton_NS SoC<br><br>This change adds support for Intel Denverton_NS SoC.<br>Code is based partially on Apollolake/Skylake code.<br><br>Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1<br>Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com><br>---<br>A src/soc/intel/denverton_ns/Kconfig<br>A src/soc/intel/denverton_ns/Makefile.inc<br>A src/soc/intel/denverton_ns/acpi.c<br>A src/soc/intel/denverton_ns/acpi/cpu.asl<br>A src/soc/intel/denverton_ns/acpi/globalnvs.asl<br>A src/soc/intel/denverton_ns/acpi/irqlinks.asl<br>A src/soc/intel/denverton_ns/acpi/lpc.asl<br>A src/soc/intel/denverton_ns/acpi/northcluster.asl<br>A src/soc/intel/denverton_ns/acpi/npk.asl<br>A src/soc/intel/denverton_ns/acpi/pcie.asl<br>A src/soc/intel/denverton_ns/acpi/pcie_port.asl<br>A src/soc/intel/denverton_ns/acpi/pmc.asl<br>A src/soc/intel/denverton_ns/acpi/sata.asl<br>A src/soc/intel/denverton_ns/acpi/sata2.asl<br>A src/soc/intel/denverton_ns/acpi/sleepstates.asl<br>A src/soc/intel/denverton_ns/acpi/smbus.asl<br>A src/soc/intel/denverton_ns/acpi/smbus2.asl<br>A src/soc/intel/denverton_ns/acpi/southcluster.asl<br>A src/soc/intel/denverton_ns/acpi/xhci.asl<br>A src/soc/intel/denverton_ns/bootblock/bootblock.c<br>A src/soc/intel/denverton_ns/bootblock/cache_as_ram_fsp.S<br>A src/soc/intel/denverton_ns/bootblock/uart.c<br>A src/soc/intel/denverton_ns/chip.c<br>A src/soc/intel/denverton_ns/chip.h<br>A src/soc/intel/denverton_ns/cpu.c<br>A src/soc/intel/denverton_ns/csme_ie_kt.c<br>A src/soc/intel/denverton_ns/exit_car_fsp.S<br>A src/soc/intel/denverton_ns/fiamux.c<br>A src/soc/intel/denverton_ns/gpio.c<br>A src/soc/intel/denverton_ns/hob_display.c<br>A src/soc/intel/denverton_ns/include/soc/acpi.h<br>A src/soc/intel/denverton_ns/include/soc/bootblock.h<br>A src/soc/intel/denverton_ns/include/soc/cpu.h<br>A src/soc/intel/denverton_ns/include/soc/fiamux.h<br>A src/soc/intel/denverton_ns/include/soc/gpio.h<br>A src/soc/intel/denverton_ns/include/soc/gpio_defs.h<br>A src/soc/intel/denverton_ns/include/soc/iomap.h<br>A src/soc/intel/denverton_ns/include/soc/lpc.h<br>A src/soc/intel/denverton_ns/include/soc/msr.h<br>A src/soc/intel/denverton_ns/include/soc/nvs.h<br>A src/soc/intel/denverton_ns/include/soc/p2sb.h<br>A src/soc/intel/denverton_ns/include/soc/pattrs.h<br>A src/soc/intel/denverton_ns/include/soc/pci_devs.h<br>A src/soc/intel/denverton_ns/include/soc/pcr.h<br>A src/soc/intel/denverton_ns/include/soc/pm.h<br>A src/soc/intel/denverton_ns/include/soc/pmc.h<br>A src/soc/intel/denverton_ns/include/soc/ramstage.h<br>A src/soc/intel/denverton_ns/include/soc/romstage.h<br>A src/soc/intel/denverton_ns/include/soc/sata.h<br>A src/soc/intel/denverton_ns/include/soc/smbus.h<br>A src/soc/intel/denverton_ns/include/soc/smm.h<br>A src/soc/intel/denverton_ns/include/soc/soc_util.h<br>A src/soc/intel/denverton_ns/include/soc/systemagent.h<br>A src/soc/intel/denverton_ns/include/soc/uart.h<br>A src/soc/intel/denverton_ns/lpc.c<br>A src/soc/intel/denverton_ns/memmap.c<br>A src/soc/intel/denverton_ns/npk.c<br>A src/soc/intel/denverton_ns/pmc.c<br>A src/soc/intel/denverton_ns/pmutil.c<br>A src/soc/intel/denverton_ns/reset.c<br>A src/soc/intel/denverton_ns/romstage.c<br>A src/soc/intel/denverton_ns/sata.c<br>A src/soc/intel/denverton_ns/smihandler.c<br>A src/soc/intel/denverton_ns/smm.c<br>A src/soc/intel/denverton_ns/soc_util.c<br>A src/soc/intel/denverton_ns/spi.c<br>A src/soc/intel/denverton_ns/systemagent.c<br>A src/soc/intel/denverton_ns/tsc_freq.c<br>A src/soc/intel/denverton_ns/uart.c<br>A src/soc/intel/denverton_ns/uart_debug.c<br>A src/soc/intel/denverton_ns/upd_display.c<br>A src/soc/intel/denverton_ns/xhci.c<br>72 files changed, 9,501 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/20861/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"></pre><p>To view, visit <a href="https://review.coreboot.org/20861">change 20861</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20861"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1 </div>
<div style="display:none"> Gerrit-Change-Number: 20861 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Mariusz Szafranski </div>