<p>Aladyshev Konstantin has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20837">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">AGESA: Correct PCI function number for MEM_GET(SET)REG outputs<br><br>PCI function number takes only 3 bits, therefore<br>correct bitmask for it is 0x7.<br><br>Change-Id: Id41700be0474eecc4d5b5173c4d5686c421735e3<br>Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com><br>---<br>M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c<br>M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c<br>M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c<br>M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c<br>M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c<br>M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c<br>M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c<br>M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c<br>M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c<br>M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c<br>M src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c<br>M src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c<br>M src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c<br>M src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c<br>M src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c<br>M src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c<br>M src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c<br>M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c<br>M src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c<br>19 files changed, 38 insertions(+), 38 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/20837/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c<br>index b4335d6..ebf73e0 100644<br>--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c<br>+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c<br>@@ -209,7 +209,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -240,7 +240,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c<br>index 7d5b684..c721618 100644<br>--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c<br>+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c<br>@@ -194,7 +194,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -220,7 +220,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c<br>index b84006b..9b871f2 100644<br>--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c<br>+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c<br>@@ -195,7 +195,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -221,7 +221,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c<br>index 8f59d4d..61cf26b 100644<br>--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c<br>+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c<br>@@ -210,7 +210,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -241,7 +241,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c<br>index ff6e673..607fce0 100644<br>--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c<br>+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c<br>@@ -219,7 +219,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> if (IsPhyDirectAccess && (NumOfInstances > 1)) {<br>@@ -251,7 +251,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c<br>index c7b6dcf..715e072 100644<br>--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c<br>+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c<br>@@ -211,7 +211,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -242,7 +242,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c<br>index 22dcee3..56d3880 100644<br>--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c<br>+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c<br>@@ -196,7 +196,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -222,7 +222,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c<br>index b549cba..317cfb7 100644<br>--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c<br>+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c<br>@@ -197,7 +197,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -223,7 +223,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c<br>index a8a1170..da6d6fa 100644<br>--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c<br>+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c<br>@@ -212,7 +212,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -243,7 +243,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c<br>index e92dec0..109cd53 100644<br>--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c<br>+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c<br>@@ -242,7 +242,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> if (IsPhyDirectAccess && (NumOfInstances > 1)) {<br>@@ -276,7 +276,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c<br>index 7915b84..f9acf5a 100644<br>--- a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c<br>+++ b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c<br>@@ -345,7 +345,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> if (IsPhyDirectAccess && (NumOfInstances > 1)) {<br>@@ -377,7 +377,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c<br>index 17c603f..953dd4c 100644<br>--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c<br>+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c<br>@@ -210,7 +210,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -241,7 +241,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c<br>index 336fb35..f97a550 100644<br>--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c<br>+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c<br>@@ -195,7 +195,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -221,7 +221,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c<br>index 5c6207d..d74b75e 100644<br>--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c<br>+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c<br>@@ -196,7 +196,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -222,7 +222,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c<br>index 90bb9e4..5177cec 100644<br>--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c<br>+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c<br>@@ -211,7 +211,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br>@@ -242,7 +242,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&<br> (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {<br>- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c<br>index 512ef14..a29093f 100644<br>--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c<br>+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c<br>@@ -238,7 +238,7 @@<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {<br> IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> if (IsPhyDirectAccess && (NumOfInstances > 1)) {<br>@@ -273,7 +273,7 @@<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {<br> IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c b/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c<br>index 8fcfc96..eb91bac 100644<br>--- a/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c<br>+++ b/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c<br>@@ -548,7 +548,7 @@<br> LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);<br> IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);<br> while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}<br>@@ -573,7 +573,7 @@<br> LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);<br> IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br> Address |= DCT_ACCESS_WRITE;<br>diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c<br>index ca2afb4..5bf1093 100644<br>--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c<br>+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c<br>@@ -235,7 +235,7 @@<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {<br> IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> if (IsPhyDirectAccess && (NumOfInstances > 1)) {<br>@@ -266,7 +266,7 @@<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {<br> IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);<br>diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c<br>index df810d0..f8b70b8 100644<br>--- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c<br>+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c<br>@@ -234,7 +234,7 @@<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {<br> IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Value);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Value);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> if (IsPhyDirectAccess && (NumOfInstances > 1)) {<br>@@ -265,7 +265,7 @@<br> if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {<br> IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",<br> NBPtr->PciAddr.Address.Device, NBPtr->Dct,<br>- (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);<br>+ (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);<br> }<br> } else if (Type == DCT_PHY_ACCESS) {<br> ASSERT (!NBPtr->IsSupported[ScrubberEn]); // Phy CSR write is not allowed after scrubber is enabled<br></pre><p>To view, visit <a href="https://review.coreboot.org/20837">change 20837</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20837"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id41700be0474eecc4d5b5173c4d5686c421735e3 </div>
<div style="display:none"> Gerrit-Change-Number: 20837 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Aladyshev Konstantin <aladyshev22@gmail.com> </div>