<p>Ravishankar Sarawadi has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20674">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/apollolake: Update memory HOB info save function<br><br>SMBIOS memory HOB produced by glk FSP has new structure members,<br>update memory HOB save routine to reflect new changes.<br><br>Change-Id: I33c6e4f2842cebbb326b6a05436fa69e3836ffc6<br>Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com><br>---<br>M src/soc/intel/apollolake/meminit.c<br>1 file changed, 36 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/20674/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/apollolake/meminit.c b/src/soc/intel/apollolake/meminit.c<br>index 0a69674..a5c2fce 100644<br>--- a/src/soc/intel/apollolake/meminit.c<br>+++ b/src/soc/intel/apollolake/meminit.c<br>@@ -268,6 +268,9 @@<br> struct memory_info *mem_info;<br> const CHANNEL_INFO *channel_info;<br> const FSP_SMBIOS_MEMORY_INFO *memory_info_hob;<br>+#if IS_ENABLED(CONFIG_SOC_INTEL_GLK)<br>+ int node;<br>+#endif<br> <br> if (mem_sku >= lp4cfg->num_skus) {<br> printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",<br>@@ -291,6 +294,38 @@<br> /* Describe the first N DIMMs in the system */<br> index = 0;<br> dimm_max = ARRAY_SIZE(mem_info->dimm);<br>+<br>+#if IS_ENABLED(CONFIG_SOC_INTEL_GLK)<br>+ for (node = 0; node < MAX_NODE_NUM; node++) {<br>+ for (channel = 0; channel < memory_info_hob->Controller[node].ChannelCount;<br>+ channel++) {<br>+ if (index >= dimm_max)<br>+ break;<br>+ channel_info = &memory_info_hob->Controller[node].ChannelInfo[channel];<br>+ for (dimm = 0; dimm < channel_info->DimmCount; dimm++) {<br>+ if (index >= dimm_max)<br>+ break;<br>+ src_dimm = &channel_info->DimmInfo[dimm];<br>+ dest_dimm = &mem_info->dimm[index];<br>+<br>+ if (!src_dimm->DimmCapacity)<br>+ continue;<br>+<br>+ /* Populate the DIMM information */<br>+ dimm_info_fill(dest_dimm,<br>+ src_dimm->DimmCapacity,<br>+ memory_info_hob->MemoryType,<br>+ memory_info_hob->ConfiguredMemoryClockSpeed,<br>+ channel_info->ChannelId,<br>+ src_dimm->DimmId,<br>+ lp4cfg->skus[mem_sku].part_num,<br>+ strlen(lp4cfg->skus[mem_sku].part_num),<br>+ memory_info_hob->DataWidth);<br>+ index++;<br>+ }<br>+ }<br>+ }<br>+#else<br> for (channel = 0; channel < memory_info_hob->ChannelCount; channel++) {<br> if (index >= dimm_max)<br> break;<br>@@ -317,6 +352,7 @@<br> index++;<br> }<br> }<br>+#endif<br> mem_info->dimm_cnt = index;<br> printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);<br> }<br></pre><p>To view, visit <a href="https://review.coreboot.org/20674">change 20674</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20674"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I33c6e4f2842cebbb326b6a05436fa69e3836ffc6 </div>
<div style="display:none"> Gerrit-Change-Number: 20674 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com> </div>