<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20648">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">gma skl: Disable DDI clocks on reset path<br><br>After reset DPLL_CTRL2 is initialized to 0. Which means some clock<br>disable bits are not set and might cause some hassle later. Set them<br>and close the related TODO.<br><br>Change-Id: I1a470dff55e317e8119906b3e397f6f2314abcbd<br>Signed-off-by: Nico Huber <nico.huber@secunet.com><br>---<br>M TODO<br>M common/haswell_shared/hw-gfx-gma-connectors-ddi.adb<br>M common/haswell_shared/hw-gfx-gma-connectors-ddi.ads<br>M common/haswell_shared/hw-gfx-gma-connectors.adb<br>M common/hw-gfx-gma-connectors.ads<br>M common/hw-gfx-gma.adb<br>M common/ironlake/hw-gfx-gma-connectors.adb<br>7 files changed, 31 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/48/20648/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/TODO b/TODO<br>index 505d2db..a122c82 100644<br>--- a/TODO<br>+++ b/TODO<br>@@ -4,6 +4,4 @@<br> <br> low    LVDS    8bit colors, data format???<br> <br>-medium  SKL     check if DPLL_CTRL2 really defaults to `Clock Off` => 0<br>-<br> medium  gfxtest take care of our own framebuffer mapping<br>diff --git a/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb b/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb<br>index 0fc4ad9..fa62a98 100644<br>--- a/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb<br>+++ b/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb<br>@@ -747,4 +747,18 @@<br>       end if;<br>    end Off;<br> <br>+   ----------------------------------------------------------------------------<br>+<br>+   procedure Post_Reset_Off<br>+   is<br>+      Clocks_Off : Word32 := 0;<br>+   begin<br>+      if not Config.Has_Per_DDI_Clock_Sel and not Config.Has_DDI_PHYs then<br>+         for Port in Digital_Port loop<br>+            Clocks_Off := Clocks_Off or DPLL_CTRL2_DDIx_CLOCK_OFF (Port);<br>+         end loop;<br>+         Registers.Set_Mask (Registers.DPLL_CTRL2, Clocks_Off);<br>+      end if;<br>+   end Post_Reset_Off;<br>+<br> end HW.GFX.GMA.Connectors.DDI;<br>diff --git a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads<br>index 4ccd995..ec1fce2 100644<br>--- a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads<br>+++ b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads<br>@@ -28,6 +28,8 @@<br> <br>    procedure Off (Port : Digital_Port);<br> <br>+   procedure Post_Reset_Off;<br>+<br> private<br>    type Buf_Trans_Range is range 0 .. 19;<br>    type Buf_Trans_Array is array (Buf_Trans_Range) of Word32;<br>diff --git a/common/haswell_shared/hw-gfx-gma-connectors.adb b/common/haswell_shared/hw-gfx-gma-connectors.adb<br>index f5e2e01..e2a69cd 100644<br>--- a/common/haswell_shared/hw-gfx-gma-connectors.adb<br>+++ b/common/haswell_shared/hw-gfx-gma-connectors.adb<br>@@ -97,4 +97,12 @@<br>       end if;<br>    end Post_All_Off;<br> <br>+   ----------------------------------------------------------------------------<br>+<br>+   procedure Post_Reset_Off<br>+   is<br>+   begin<br>+      DDI.Post_Reset_Off;<br>+   end Post_Reset_Off;<br>+<br> end HW.GFX.GMA.Connectors;<br>diff --git a/common/hw-gfx-gma-connectors.ads b/common/hw-gfx-gma-connectors.ads<br>index 30a382f..c68267c 100644<br>--- a/common/hw-gfx-gma-connectors.ads<br>+++ b/common/hw-gfx-gma-connectors.ads<br>@@ -39,4 +39,6 @@<br>    procedure Pre_All_Off;<br>    procedure Post_All_Off;<br> <br>+   procedure Post_Reset_Off;<br>+<br> end HW.GFX.GMA.Connectors;<br>diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb<br>index 53369f3..919e6d6 100644<br>--- a/common/hw-gfx-gma.adb<br>+++ b/common/hw-gfx-gma.adb<br>@@ -372,8 +372,10 @@<br>          Power_And_Clocks.Post_All_Off;<br>       else<br>          -- According to PRMs, VGA plane is the only thing<br>-         -- that's enabled by default after reset.<br>+         -- that's enabled by default after reset...<br>          Display_Controller.Legacy_VGA_Off;<br>+         -- ... along with some DDI port bits since Skylake.<br>+         Connectors.Post_Reset_Off;<br>       end if;<br> <br>       -------------------- Now restart from a clean state ---------------------<br>diff --git a/common/ironlake/hw-gfx-gma-connectors.adb b/common/ironlake/hw-gfx-gma-connectors.adb<br>index 8ae47fd..479e842 100644<br>--- a/common/ironlake/hw-gfx-gma-connectors.adb<br>+++ b/common/ironlake/hw-gfx-gma-connectors.adb<br>@@ -182,4 +182,6 @@<br>       end loop;<br>    end Post_All_Off;<br> <br>+   procedure Post_Reset_Off is null;<br>+<br> end HW.GFX.GMA.Connectors;<br></pre><p>To view, visit <a href="https://review.coreboot.org/20648">change 20648</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><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<div style="display:none"> Gerrit-Project: libgfxinit </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1a470dff55e317e8119906b3e397f6f2314abcbd </div>
<div style="display:none"> Gerrit-Change-Number: 20648 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>