<p>Evelyn Huang has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20639">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">payloads/external/tianocore: Add and apply patches for tianocore<br><br>Create a directory patches, and add necessary patches to be applied to<br>upstream tianocore.<br><br>Patches include:<br>-Patch for no PCI address enumeration<br>-Patches to enable keyboard input<br>-Patch to disable serial to speed up boot process.<br><br>Patches pulled from https://github.com/MattDevo/edk2.<br><br>Additionally, modify tianocore Makefile to apply patches during build.<br><br>Change-Id: I4eaa602418995a68753b1ed13af8c6374eaa312f<br>Signed-off-by: Evelyn Huang <evhuang@google.com><br>---<br>M payloads/external/tianocore/Makefile<br>A payloads/external/tianocore/patches/01_CorebootPayloadPkg_pcinoenum.patch<br>A payloads/external/tianocore/patches/02_CorebootPayloadPkg_bds.patch<br>A payloads/external/tianocore/patches/03_Library_EndofDXE.patch<br>A payloads/external/tianocore/patches/04_CorebootPayloadPkg_addps2.patch<br>A payloads/external/tianocore/patches/05_CorebootPayloadPkg_noserial.patch<br>6 files changed, 2,804 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/20639/3</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/payloads/external/tianocore/Makefile b/payloads/external/tianocore/Makefile<br>index 38a3828..aea9377 100644<br>--- a/payloads/external/tianocore/Makefile<br>+++ b/payloads/external/tianocore/Makefile<br>@@ -17,6 +17,7 @@<br> export SHELL := env bash<br> <br> STABLE_COMMIT_ID=315d9d08fd77db1024ccc5307823da8aaed85e2f<br>+#STABLE_COMMIT_ID=5fc3889bb3c64f8cd81d7d387f829f146a1998fd<br> TAG-$(CONFIG_TIANOCORE_MASTER)=origin/master<br> TAG-$(CONFIG_TIANOCORE_STABLE)=$(STABLE_COMMIT_ID)<br> <br>@@ -52,6 +53,12 @@<br> git checkout master; \<br> git branch -D coreboot 2>/dev/null; \<br> git checkout -b coreboot $(TAG-y)<br>+ for patch in $(CURDIR)/patches/*.patch; do \<br>+ echo "Applying $$patch"; \<br>+ cd $(project_dir); \<br>+ git am --keep-cr $$patch || \<br>+ ( printf " Error when applying patches.\n"; git am --abort; exit 1; ); \<br>+ done<br> <br> checktools:<br> printf "Checking uuid-dev..."<br>diff --git a/payloads/external/tianocore/patches/01_CorebootPayloadPkg_pcinoenum.patch b/payloads/external/tianocore/patches/01_CorebootPayloadPkg_pcinoenum.patch<br>new file mode 100644<br>index 0000000..448da4a<br>--- /dev/null<br>+++ b/payloads/external/tianocore/patches/01_CorebootPayloadPkg_pcinoenum.patch<br>@@ -0,0 +1,65 @@<br>+From 4f9d41e69356ce7486b0c74a754ff494256723de Mon Sep 17 00:00:00 2001<br>+From: CoolStar <coolstarorganization@gmail.com><br>+Date: Sun, 4 Dec 2016 11:23:38 -0800<br>+Subject: [PATCH] PCI: use Duet's PciNoEnumeration<br>+<br>+---<br>+ CorebootPayloadPkg/CorebootPayloadPkg.fdf | 4 ++--<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 7 ++-----<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 7 ++-----<br>+ 3 files changed, 6 insertions(+), 12 deletions(-)<br>+<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf b/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>+index 303e626842..a39e3999ba 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>+@@ -124,8 +124,8 @@ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf<br>+ #<br>+ # PCI Support<br>+ #<br>+-INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf<br>+-INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf<br>++INF DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf<br>++INF DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf<br>+ <br>+ #<br>+ # ISA Support<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+index cdfcb75b59..e838aca61d 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+@@ -450,11 +450,8 @@<br>+ #<br>+ # PCI Support<br>+ #<br>+- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf<br>+- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {<br>+- <LibraryClasses><br>+- PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf<br>+- }<br>++ DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf<br>++ DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf<br>+ <br>+ #<br>+ # SCSI/ATA/IDE/DISK Support<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+index 6b16af63ba..c25d821fd4 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+@@ -451,11 +451,8 @@<br>+ #<br>+ # PCI Support<br>+ #<br>+- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf<br>+- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {<br>+- <LibraryClasses><br>+- PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf<br>+- }<br>++ DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf<br>++ DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf<br>+ <br>+ #<br>+ # SCSI/ATA/IDE/DISK Support<br>+-- <br>+2.13.2.725.g09c95d1e9-goog<br>+<br>diff --git a/payloads/external/tianocore/patches/02_CorebootPayloadPkg_bds.patch b/payloads/external/tianocore/patches/02_CorebootPayloadPkg_bds.patch<br>new file mode 100644<br>index 0000000..9bfff5f<br>--- /dev/null<br>+++ b/payloads/external/tianocore/patches/02_CorebootPayloadPkg_bds.patch<br>@@ -0,0 +1,2551 @@<br>+From 5121087836c1ad2a08857d494c0d9ecb183f4f98 Mon Sep 17 00:00:00 2001<br>+From: Evelyn Huang <evhuang@google.com><br>+Date: Tue, 18 Jul 2017 15:50:38 -0600<br>+Subject: [PATCH] Rebasing<br>+<br>+---<br>+ CorebootModulePkg/CorebootModulePkg.dec | 8 +<br>+ .../Include/Guid/LdrMemoryDescriptor.h | 33 +<br>+ .../Include/Guid/PciExpressBaseAddress.h | 46 +<br>+ CorebootModulePkg/Include/Guid/PciOptionRomTable.h | 41 +<br>+ .../Library/CorebootBdsLib/BdsPlatform.c | 1731 ++++++++++++++++++++<br>+ .../Library/CorebootBdsLib/BdsPlatform.h | 288 ++++<br>+ .../Library/CorebootBdsLib/PlatformBds.inf | 65 +<br>+ .../Library/CorebootBdsLib/PlatformData.c | 161 ++<br>+ CorebootPayloadPkg/CorebootPayloadPkg.fdf | 5 +-<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 12 +-<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 12 +-<br>+ 11 files changed, 2388 insertions(+), 14 deletions(-)<br>+ create mode 100644 CorebootModulePkg/Include/Guid/LdrMemoryDescriptor.h<br>+ create mode 100644 CorebootModulePkg/Include/Guid/PciExpressBaseAddress.h<br>+ create mode 100644 CorebootModulePkg/Include/Guid/PciOptionRomTable.h<br>+ create mode 100644 CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c<br>+ create mode 100644 CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.h<br>+ create mode 100644 CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+ create mode 100644 CorebootModulePkg/Library/CorebootBdsLib/PlatformData.c<br>+<br>+diff --git a/CorebootModulePkg/CorebootModulePkg.dec b/CorebootModulePkg/CorebootModulePkg.dec<br>+index 7f1309bdae..20932a1d04 100644<br>+--- a/CorebootModulePkg/CorebootModulePkg.dec<br>++++ b/CorebootModulePkg/CorebootModulePkg.dec<br>+@@ -33,8 +33,16 @@<br>+ gUefiCorebootModulePkgTokenSpaceGuid = {0xe6ff49a0, 0x15df, 0x48fd, {0x9a, 0xcf, 0xd7, 0xdc, 0x27, 0x1b, 0x39, 0xd5}}<br>+ gUefiSystemTableInfoGuid = {0x16c8a6d0, 0xfe8a, 0x4082, {0xa2, 0x8, 0xcf, 0x89, 0xc4, 0x29, 0x4, 0x33}}<br>+ gUefiFrameBufferInfoGuid = {0xdc2cd8bd, 0x402c, 0x4dc4, {0x9b, 0xe0, 0xc, 0x43, 0x2b, 0x7, 0xfa, 0x34}}<br>++ gEfiPciExpressBaseAddressGuid = {0x3677d529, 0x326f, 0x4603, {0xa9, 0x26, 0xea, 0xac, 0xe0, 0x1d, 0xcb, 0xb0 }}<br>+ gUefiAcpiBoardInfoGuid = {0xad3d31b, 0xb3d8, 0x4506, {0xae, 0x71, 0x2e, 0xf1, 0x10, 0x6, 0xd9, 0xf}}<br>+ <br>++ ## Include/Guid/PciOptionRomTable.h<br>++ gEfiPciOptionRomTableGuid = { 0x7462660F, 0x1CBD, 0x48DA, { 0xAD, 0x11, 0x91, 0x71, 0x79, 0x13, 0x83, 0x1C }}<br>++<br>++ ## Include/Guid/LdrMemoryDescriptor.h<br>++ gLdrMemoryDescriptorGuid = { 0x7701d7e5, 0x7d1d, 0x4432, { 0xa4, 0x68, 0x67, 0x3d, 0xab, 0x8a, 0xde, 0x60 }}<br>++<br>++<br>+ <br>+ [Ppis]<br>+ <br>+diff --git a/CorebootModulePkg/Include/Guid/LdrMemoryDescriptor.h b/CorebootModulePkg/Include/Guid/LdrMemoryDescriptor.h<br>+new file mode 100644<br>+index 0000000000..38a997deea<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Include/Guid/LdrMemoryDescriptor.h<br>+@@ -0,0 +1,33 @@<br>++/** @file<br>++ Guid is for GUIDED HOB of LDR memory descriptor.<br>++<br>++Copyright (c) 2011, Intel Corporation. All rights reserved.<BR><br>++This program and the accompanying materials <br>++are licensed and made available under the terms and conditions of the BSD License <br>++which accompanies this distribution. The full text of the license may be found at <br>++http://opensource.org/licenses/bsd-license.php <br>++ <br>++THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++<br>++**/<br>++<br>++#ifndef __LDR_MEMORY_DESCRIPTOR__<br>++#define __LDR_MEMORY_DESCRIPTOR__<br>++<br>++#define LDR_MEMORY_DESCRIPTOR_GUID \<br>++ { 0x7701d7e5, 0x7d1d, 0x4432, {0xa4, 0x68, 0x67, 0x3d, 0xab, 0x8a, 0xde, 0x60}}<br>++<br>++#pragma pack(1)<br>++<br>++typedef struct {<br>++ EFI_HOB_GUID_TYPE Hob;<br>++ UINTN MemDescCount;<br>++ EFI_MEMORY_DESCRIPTOR *MemDesc;<br>++} MEMORY_DESC_HOB;<br>++<br>++#pragma pack()<br>++<br>++extern EFI_GUID gLdrMemoryDescriptorGuid;<br>++<br>++#endif<br>+diff --git a/CorebootModulePkg/Include/Guid/PciExpressBaseAddress.h b/CorebootModulePkg/Include/Guid/PciExpressBaseAddress.h<br>+new file mode 100644<br>+index 0000000000..ff554383c1<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Include/Guid/PciExpressBaseAddress.h<br>+@@ -0,0 +1,46 @@<br>++/** @file<br>++<br>++Copyright (c) 2006, Intel Corporation. All rights reserved.<BR><br>++This program and the accompanying materials <br>++are licensed and made available under the terms and conditions of the BSD License <br>++which accompanies this distribution. The full text of the license may be found at <br>++http://opensource.org/licenses/bsd-license.php <br>++ <br>++THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++<br>++Module Name:<br>++ <br>++ PciExpressBaseAddress.h<br>++ <br>++Abstract:<br>++<br>++<br>++ GUIDs used for PciExpress Base Address<br>++<br>++**/<br>++<br>++#ifndef _EFI_PCI_EXPRESS_BASE_ADDRESS_H_<br>++#define _EFI_PCI_EXPRESS_BASE_ADDRESS_H_<br>++<br>++#define EFI_PCI_EXPRESS_BASE_ADDRESS_GUID \<br>++ { \<br>++ 0x3677d529, 0x326f, 0x4603, {0xa9, 0x26, 0xea, 0xac, 0xe0, 0x1d, 0xcb, 0xb0} \<br>++ }<br>++<br>++//<br>++// Following structure defines PCI Express Base Address information.<br>++// This information is platform specific, and built into hob in PEI phase.<br>++// It can be consumed by PEI PCI driver and DXE PCI driver.<br>++//<br>++#pragma pack(1)<br>++typedef struct _EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION {<br>++ UINT32 HostBridgeNumber;<br>++ UINT32 RootBridgeNumber;<br>++ UINT64 PciExpressBaseAddress;<br>++} EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION;<br>++#pragma pack()<br>++<br>++extern EFI_GUID gEfiPciExpressBaseAddressGuid;<br>++<br>++#endif<br>+diff --git a/CorebootModulePkg/Include/Guid/PciOptionRomTable.h b/CorebootModulePkg/Include/Guid/PciOptionRomTable.h<br>+new file mode 100644<br>+index 0000000000..a2fb99710a<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Include/Guid/PciOptionRomTable.h<br>+@@ -0,0 +1,41 @@<br>++/** @file<br>++ GUID and data structure used to describe the list of PCI Option ROMs present in a system.<br>++ <br>++Copyright (c) 2006, Intel Corporation. All rights reserved.<BR><br>++This program and the accompanying materials <br>++are licensed and made available under the terms and conditions of the BSD License <br>++which accompanies this distribution. The full text of the license may be found at <br>++http://opensource.org/licenses/bsd-license.php <br>++ <br>++THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++<br>++**/<br>++<br>++#ifndef __PCI_OPTION_ROM_TABLE_GUID_H_<br>++#define __PCI_OPTION_ROM_TABLE_GUID_H_<br>++<br>++#define EFI_PCI_OPTION_ROM_TABLE_GUID \<br>++ { 0x7462660f, 0x1cbd, 0x48da, {0xad, 0x11, 0x91, 0x71, 0x79, 0x13, 0x83, 0x1c } }<br>++<br>++extern EFI_GUID gEfiPciOptionRomTableGuid;<br>++<br>++typedef struct {<br>++ EFI_PHYSICAL_ADDRESS RomAddress; <br>++ EFI_MEMORY_TYPE MemoryType;<br>++ UINT32 RomLength; <br>++ UINT32 Seg; <br>++ UINT8 Bus; <br>++ UINT8 Dev; <br>++ UINT8 Func; <br>++ BOOLEAN ExecutedLegacyBiosImage; <br>++ BOOLEAN DontLoadEfiRom;<br>++} EFI_PCI_OPTION_ROM_DESCRIPTOR;<br>++<br>++typedef struct {<br>++ UINT64 PciOptionRomCount;<br>++ EFI_PCI_OPTION_ROM_DESCRIPTOR *PciOptionRomDescriptors;<br>++} EFI_PCI_OPTION_ROM_TABLE;<br>++<br>++#endif // __PCI_OPTION_ROM_TABLE_GUID_H_<br>++<br>+diff --git a/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c<br>+new file mode 100644<br>+index 0000000000..b6253a17f8<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c<br>+@@ -0,0 +1,1731 @@<br>++/*++<br>++<br>++Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR><br>++This program and the accompanying materials <br>++are licensed and made available under the terms and conditions of the BSD License <br>++which accompanies this distribution. The full text of the license may be found at <br>++http://opensource.org/licenses/bsd-license.php <br>++ <br>++THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++<br>++Module Name:<br>++<br>++ BdsPlatform.c<br>++<br>++Abstract:<br>++<br>++ This file include all platform action which can be customized<br>++ by IBV/OEM.<br>++<br>++--*/<br>++<br>++#include "BdsPlatform.h"<br>++<br>++#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)<br>++<br>++extern BOOLEAN gConnectAllHappened;<br>++extern USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath;<br>++<br>++EFI_GUID *gTableGuidArray[] = {<br>++ &gEfiAcpi20TableGuid, &gEfiAcpiTableGuid, &gEfiSmbiosTableGuid, &gEfiMpsTableGuid<br>++ };<br>++<br>++//<br>++// BDS Platform Functions<br>++//<br>++<br>++VOID<br>++GetSystemTablesFromHob (<br>++ VOID<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ Find GUID'ed HOBs that contain EFI_PHYSICAL_ADDRESS of ACPI, SMBIOS, MPs tables<br>++<br>++Arguments:<br>++ None<br>++<br>++Returns:<br>++ None.<br>++<br>++--*/<br>++{<br>++ EFI_PEI_HOB_POINTERS GuidHob;<br>++ EFI_PEI_HOB_POINTERS HobStart;<br>++ EFI_PHYSICAL_ADDRESS *Table;<br>++ UINTN Index;<br>++<br>++ //<br>++ // Get Hob List<br>++ //<br>++ HobStart.Raw = GetHobList ();<br>++ //<br>++ // Iteratively add ACPI Table, SMBIOS Table, MPS Table to EFI System Table<br>++ //<br>++ for (Index = 0; Index < ARRAY_SIZE (gTableGuidArray); ++Index) {<br>++ GuidHob.Raw = GetNextGuidHob (gTableGuidArray[Index], HobStart.Raw);<br>++ if (GuidHob.Raw != NULL) {<br>++ Table = GET_GUID_HOB_DATA (GuidHob.Guid);<br>++ if (Table != NULL) {<br>++ //<br>++ // Check if Mps Table/Smbios Table/Acpi Table exists in E/F seg,<br>++ // According to UEFI Spec, we should make sure Smbios table, <br>++ // ACPI table and Mps tables kept in memory of specified type<br>++ //<br>++ ConvertSystemTable(gTableGuidArray[Index], (VOID**)&Table);<br>++ gBS->InstallConfigurationTable (gTableGuidArray[Index], (VOID *)Table);<br>++ }<br>++ }<br>++ }<br>++<br>++ return ;<br>++}<br>++<br>++#if 0<br>++VOID<br>++PrintMemoryMap (<br>++ VOID<br>++ )<br>++{<br>++ EFI_MEMORY_DESCRIPTOR *MemMap;<br>++ EFI_MEMORY_DESCRIPTOR *MemMapPtr;<br>++ UINTN MemMapSize;<br>++ UINTN MapKey, DescriptorSize;<br>++ UINTN Index;<br>++ UINT32 DescriptorVersion;<br>++ UINT64 Bytes;<br>++ EFI_STATUS Status;<br>++<br>++ MemMapSize = 0;<br>++ MemMap = NULL;<br>++ Status = gBS->GetMemoryMap (&MemMapSize, MemMap, &MapKey, &DescriptorSize, &DescriptorVersion);<br>++ ASSERT (Status == EFI_BUFFER_TOO_SMALL);<br>++ MemMapSize += EFI_PAGE_SIZE;<br>++ Status = gBS->AllocatePool (EfiBootServicesData, MemMapSize, &MemMap);<br>++ ASSERT (Status == EFI_SUCCESS);<br>++ Status = gBS->GetMemoryMap (&MemMapSize, MemMap, &MapKey, &DescriptorSize, &DescriptorVersion);<br>++ ASSERT (Status == EFI_SUCCESS);<br>++ MemMapPtr = MemMap;<br>++<br>++ ASSERT (DescriptorVersion == EFI_MEMORY_DESCRIPTOR_VERSION);<br>++<br>++ for (Index = 0; Index < MemMapSize / DescriptorSize; Index ++) {<br>++ Bytes = LShiftU64 (MemMap->NumberOfPages, 12);<br>++ DEBUG ((EFI_D_ERROR, "%lX-%lX %lX %lX %X\n",<br>++ MemMap->PhysicalStart, <br>++ MemMap->PhysicalStart + Bytes - 1,<br>++ MemMap->NumberOfPages, <br>++ MemMap->Attribute,<br>++ (UINTN)MemMap->Type));<br>++ MemMap = (EFI_MEMORY_DESCRIPTOR *)((UINTN)MemMap + DescriptorSize);<br>++ }<br>++<br>++ gBS->FreePool (MemMapPtr);<br>++}<br>++#endif<br>++<br>++VOID<br>++UpdateMemoryMap (<br>++ VOID<br>++ )<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_PEI_HOB_POINTERS GuidHob;<br>++ VOID *Table;<br>++ MEMORY_DESC_HOB MemoryDescHob;<br>++ UINTN Index;<br>++ EFI_PHYSICAL_ADDRESS Memory;<br>++ EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;<br>++ <br>++ GuidHob.Raw = GetFirstGuidHob (&gLdrMemoryDescriptorGuid);<br>++ if (GuidHob.Raw == NULL) {<br>++ DEBUG ((EFI_D_ERROR, "Fail to get gEfiLdrMemoryDescriptorGuid from GUID HOB LIST!\n"));<br>++ return;<br>++ }<br>++ Table = GET_GUID_HOB_DATA (GuidHob.Guid);<br>++ if (Table == NULL) {<br>++ DEBUG ((EFI_D_ERROR, "Fail to get gEfiLdrMemoryDescriptorGuid from GUID HOB LIST!\n"));<br>++ return;<br>++ }<br>++ MemoryDescHob.MemDescCount = *(UINTN *)Table;<br>++ MemoryDescHob.MemDesc = *(EFI_MEMORY_DESCRIPTOR **)((UINTN)Table + sizeof(UINTN));<br>++<br>++ //<br>++ // Add ACPINVS, ACPIReclaim, and Reserved memory to MemoryMap<br>++ //<br>++ for (Index = 0; Index < MemoryDescHob.MemDescCount; Index++) {<br>++ if (MemoryDescHob.MemDesc[Index].PhysicalStart < 0x100000) {<br>++ continue;<br>++ }<br>++ if (MemoryDescHob.MemDesc[Index].PhysicalStart >= 0x100000000ULL) {<br>++ continue;<br>++ }<br>++ if ((MemoryDescHob.MemDesc[Index].Type == EfiReservedMemoryType) ||<br>++ (MemoryDescHob.MemDesc[Index].Type == EfiRuntimeServicesData) ||<br>++ (MemoryDescHob.MemDesc[Index].Type == EfiRuntimeServicesCode) ||<br>++ (MemoryDescHob.MemDesc[Index].Type == EfiACPIReclaimMemory) ||<br>++ (MemoryDescHob.MemDesc[Index].Type == EfiACPIMemoryNVS)) {<br>++ DEBUG ((EFI_D_ERROR, "PhysicalStart - 0x%016lx, ", MemoryDescHob.MemDesc[Index].PhysicalStart));<br>++ DEBUG ((EFI_D_ERROR, "PageNumber - 0x%016lx, ", MemoryDescHob.MemDesc[Index].NumberOfPages));<br>++ DEBUG ((EFI_D_ERROR, "Attribute - 0x%016lx, ", MemoryDescHob.MemDesc[Index].Attribute));<br>++ DEBUG ((EFI_D_ERROR, "Type - 0x%08x\n", MemoryDescHob.MemDesc[Index].Type));<br>++ if ((MemoryDescHob.MemDesc[Index].Type == EfiRuntimeServicesData) ||<br>++ (MemoryDescHob.MemDesc[Index].Type == EfiRuntimeServicesCode)) {<br>++ //<br>++ // For RuntimeSevicesData and RuntimeServicesCode, they are BFV or DxeCore.<br>++ // The memory type is assigned in EfiLdr<br>++ //<br>++ Status = gDS->GetMemorySpaceDescriptor (MemoryDescHob.MemDesc[Index].PhysicalStart, &Descriptor);<br>++ if (EFI_ERROR (Status)) {<br>++ continue;<br>++ }<br>++ if (Descriptor.GcdMemoryType != EfiGcdMemoryTypeReserved) {<br>++ //<br>++ // BFV or tested DXE core<br>++ //<br>++ continue;<br>++ }<br>++ //<br>++ // Untested DXE Core region, free and remove<br>++ //<br>++ Status = gDS->FreeMemorySpace (<br>++ MemoryDescHob.MemDesc[Index].PhysicalStart,<br>++ LShiftU64 (MemoryDescHob.MemDesc[Index].NumberOfPages, EFI_PAGE_SHIFT)<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ DEBUG ((EFI_D_ERROR, "FreeMemorySpace fail - %r!\n", Status));<br>++ continue;<br>++ }<br>++ Status = gDS->RemoveMemorySpace (<br>++ MemoryDescHob.MemDesc[Index].PhysicalStart,<br>++ LShiftU64 (MemoryDescHob.MemDesc[Index].NumberOfPages, EFI_PAGE_SHIFT)<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ DEBUG ((EFI_D_ERROR, "RemoveMemorySpace fail - %r!\n", Status));<br>++ continue;<br>++ }<br>++<br>++ //<br>++ // Convert Runtime type to BootTime type<br>++ //<br>++ if (MemoryDescHob.MemDesc[Index].Type == EfiRuntimeServicesData) {<br>++ MemoryDescHob.MemDesc[Index].Type = EfiBootServicesData;<br>++ } else {<br>++ MemoryDescHob.MemDesc[Index].Type = EfiBootServicesCode;<br>++ }<br>++<br>++ //<br>++ // PassThrough, let below code add and alloate.<br>++ //<br>++ }<br>++ //<br>++ // ACPI or reserved memory<br>++ //<br>++ Status = gDS->AddMemorySpace (<br>++ EfiGcdMemoryTypeSystemMemory,<br>++ MemoryDescHob.MemDesc[Index].PhysicalStart,<br>++ LShiftU64 (MemoryDescHob.MemDesc[Index].NumberOfPages, EFI_PAGE_SHIFT),<br>++ MemoryDescHob.MemDesc[Index].Attribute<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ DEBUG ((EFI_D_ERROR, "AddMemorySpace fail - %r!\n", Status));<br>++ if ((MemoryDescHob.MemDesc[Index].Type == EfiACPIReclaimMemory) ||<br>++ (MemoryDescHob.MemDesc[Index].Type == EfiACPIMemoryNVS)) {<br>++ //<br>++ // For EfiACPIReclaimMemory and EfiACPIMemoryNVS, it must success.<br>++ // For EfiReservedMemoryType, there maybe overlap. So skip check here.<br>++ //<br>++// ASSERT_EFI_ERROR (Status);<br>++ }<br>++ continue;<br>++ }<br>++<br>++ Memory = MemoryDescHob.MemDesc[Index].PhysicalStart;<br>++ Status = gBS->AllocatePages (<br>++ AllocateAddress,<br>++ (EFI_MEMORY_TYPE)MemoryDescHob.MemDesc[Index].Type,<br>++ (UINTN)MemoryDescHob.MemDesc[Index].NumberOfPages,<br>++ &Memory<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ DEBUG ((EFI_D_ERROR, "AllocatePages fail - %r!\n", Status));<br>++ //<br>++ // For the page added, it must be allocated.<br>++ //<br>++// ASSERT_EFI_ERROR (Status);<br>++ continue;<br>++ }<br>++ }<br>++ }<br>++ <br>++}<br>++<br>++EFI_STATUS<br>++DisableUsbLegacySupport(<br>++ void<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ Disabble the USB legacy Support in all Ehci and Uhci.<br>++ This function assume all PciIo handles have been created in system.<br>++ <br>++Arguments:<br>++ None<br>++ <br>++Returns:<br>++ EFI_SUCCESS<br>++ EFI_NOT_FOUND<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_HANDLE *HandleArray;<br>++ UINTN HandleArrayCount;<br>++ UINTN Index;<br>++ EFI_PCI_IO_PROTOCOL *PciIo;<br>++ UINT8 Class[3];<br>++ UINT16 Command;<br>++ UINT32 HcCapParams;<br>++ UINT32 ExtendCap;<br>++ UINT32 Value;<br>++ UINT32 TimeOut;<br>++ <br>++ //<br>++ // Find the usb host controller <br>++ // <br>++ Status = gBS->LocateHandleBuffer (<br>++ ByProtocol,<br>++ &gEfiPciIoProtocolGuid,<br>++ NULL,<br>++ &HandleArrayCount,<br>++ &HandleArray<br>++ );<br>++ if (!EFI_ERROR (Status)) {<br>++ for (Index = 0; Index < HandleArrayCount; Index++) {<br>++ Status = gBS->HandleProtocol (<br>++ HandleArray[Index],<br>++ &gEfiPciIoProtocolGuid,<br>++ (VOID **)&PciIo<br>++ );<br>++ if (!EFI_ERROR (Status)) {<br>++ //<br>++ // Find the USB host controller controller<br>++ //<br>++ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x09, 3, &Class);<br>++ if (!EFI_ERROR (Status)) {<br>++ if ((PCI_CLASS_SERIAL == Class[2]) &&<br>++ (PCI_CLASS_SERIAL_USB == Class[1])) {<br>++ if (PCI_IF_UHCI == Class[0]) {<br>++ //<br>++ // Found the UHCI, then disable the legacy support<br>++ //<br>++ Command = 0;<br>++ Status = PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, 0xC0, 1, &Command);<br>++ } else if (PCI_IF_EHCI == Class[0]) {<br>++ //<br>++ // Found the EHCI, then disable the legacy support<br>++ //<br>++ Status = PciIo->Mem.Read (<br>++ PciIo,<br>++ EfiPciIoWidthUint32,<br>++ 0, //EHC_BAR_INDEX<br>++ (UINT64) 0x08, //EHC_HCCPARAMS_OFFSET<br>++ 1,<br>++ &HcCapParams<br>++ );<br>++ <br>++ ExtendCap = (HcCapParams >> 8) & 0xFF;<br>++ //<br>++ // Disable the SMI in USBLEGCTLSTS firstly<br>++ //<br>++ PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, ExtendCap + 0x4, 1, &Value);<br>++ Value &= 0xFFFF0000;<br>++ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, ExtendCap + 0x4, 1, &Value);<br>++ <br>++ //<br>++ // Get EHCI Ownership from legacy bios<br>++ //<br>++ PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, ExtendCap, 1, &Value);<br>++ Value |= (0x1 << 24);<br>++ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, ExtendCap, 1, &Value);<br>++<br>++ TimeOut = 40;<br>++ while (TimeOut--) {<br>++ gBS->Stall (500);<br>++<br>++ PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, ExtendCap, 1, &Value);<br>++<br>++ if ((Value & 0x01010000) == 0x01000000) {<br>++ break;<br>++ }<br>++ }<br>++ }<br>++ } <br>++ }<br>++ }<br>++ }<br>++ } else {<br>++ return Status;<br>++ }<br>++ gBS->FreePool (HandleArray);<br>++ return EFI_SUCCESS;<br>++}<br>++<br>++<br>++VOID<br>++EFIAPI<br>++PlatformBdsInit (<br>++ VOID<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Platform Bds init. Include the platform firmware vendor, revision<br>++ and so crc check.<br>++<br>++Arguments:<br>++<br>++Returns:<br>++<br>++ None.<br>++<br>++--*/<br>++{<br>++ GetSystemTablesFromHob ();<br>++<br>++ UpdateMemoryMap ();<br>++ <br>++ //<br>++ // Append Usb Keyboard short form DevicePath into "ConInDev" <br>++ //<br>++ BdsLibUpdateConsoleVariable (<br>++ VarConsoleInpDev,<br>++ (EFI_DEVICE_PATH_PROTOCOL *) &gUsbClassKeyboardDevicePath,<br>++ NULL<br>++ );<br>++}<br>++<br>++UINT64<br>++GetPciExpressBaseAddressForRootBridge (<br>++ IN UINTN HostBridgeNumber,<br>++ IN UINTN RootBridgeNumber<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ This routine is to get PciExpress Base Address for this RootBridge<br>++<br>++Arguments:<br>++ HostBridgeNumber - The number of HostBridge<br>++ RootBridgeNumber - The number of RootBridge<br>++ <br>++Returns:<br>++ UINT64 - PciExpressBaseAddress for this HostBridge and RootBridge<br>++<br>++--*/<br>++{<br>++ EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION *PciExpressBaseAddressInfo;<br>++ UINTN BufferSize;<br>++ UINT32 Index;<br>++ UINT32 Number;<br>++ EFI_PEI_HOB_POINTERS GuidHob;<br>++<br>++ //<br>++ // Get PciExpressAddressInfo Hob<br>++ //<br>++ PciExpressBaseAddressInfo = NULL;<br>++ BufferSize = 0;<br>++ GuidHob.Raw = GetFirstGuidHob (&gEfiPciExpressBaseAddressGuid);<br>++ if (GuidHob.Raw != NULL) {<br>++ PciExpressBaseAddressInfo = GET_GUID_HOB_DATA (GuidHob.Guid);<br>++ BufferSize = GET_GUID_HOB_DATA_SIZE (GuidHob.Guid);<br>++ } else {<br>++ return 0;<br>++ }<br>++<br>++ //<br>++ // Search the PciExpress Base Address in the Hob for current RootBridge<br>++ //<br>++ Number = (UINT32)(BufferSize / sizeof(EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION));<br>++ for (Index = 0; Index < Number; Index++) {<br>++ if ((PciExpressBaseAddressInfo[Index].HostBridgeNumber == HostBridgeNumber) &&<br>++ (PciExpressBaseAddressInfo[Index].RootBridgeNumber == RootBridgeNumber)) {<br>++ return PciExpressBaseAddressInfo[Index].PciExpressBaseAddress;<br>++ }<br>++ }<br>++<br>++ //<br>++ // Do not find the PciExpress Base Address in the Hob<br>++ //<br>++ return 0; <br>++}<br>++<br>++VOID<br>++PatchPciRootBridgeDevicePath (<br>++ IN UINTN HostBridgeNumber,<br>++ IN UINTN RootBridgeNumber,<br>++ IN PLATFORM_ROOT_BRIDGE_DEVICE_PATH *RootBridge<br>++ )<br>++{<br>++ UINT64 PciExpressBase;<br>++<br>++ PciExpressBase = GetPciExpressBaseAddressForRootBridge (HostBridgeNumber, RootBridgeNumber);<br>++ <br>++ DEBUG ((EFI_D_INFO, "Get PciExpress Address from Hob: 0x%X\n", PciExpressBase));<br>++ <br>++ if (PciExpressBase != 0) {<br>++ RootBridge->PciRootBridge.HID = EISA_PNP_ID(0x0A08);<br>++ }<br>++}<br>++<br>++EFI_STATUS<br>++ConnectRootBridge (<br>++ VOID<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Connect RootBridge<br>++<br>++Arguments:<br>++<br>++ None.<br>++ <br>++Returns:<br>++<br>++ EFI_SUCCESS - Connect RootBridge successfully.<br>++ EFI_STATUS - Connect RootBridge fail.<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_HANDLE RootHandle;<br>++<br>++ //<br>++ // Patch Pci Root Bridge Device Path<br>++ //<br>++ PatchPciRootBridgeDevicePath (0, 0, &gPlatformRootBridge0);<br>++<br>++ //<br>++ // Make all the PCI_IO protocols on PCI Seg 0 show up<br>++ //<br>++ BdsLibConnectDevicePath (gPlatformRootBridges[0]);<br>++<br>++ Status = gBS->LocateDevicePath (<br>++ &gEfiDevicePathProtocolGuid, <br>++ &gPlatformRootBridges[0], <br>++ &RootHandle<br>++ );<br>++ DEBUG ((EFI_D_INFO, "Pci Root bridge handle is 0x%X\n", RootHandle));<br>++ <br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++<br>++ Status = gBS->ConnectController (RootHandle, NULL, NULL, FALSE);<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++<br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++PrepareLpcBridgeDevicePath (<br>++ IN EFI_HANDLE DeviceHandle<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Add IsaKeyboard to ConIn,<br>++ add IsaSerial to ConOut, ConIn, ErrOut.<br>++ LPC Bridge: 06 01 00<br>++<br>++Arguments:<br>++<br>++ DeviceHandle - Handle of PCIIO protocol.<br>++ <br>++Returns:<br>++<br>++ EFI_SUCCESS - LPC bridge is added to ConOut, ConIn, and ErrOut.<br>++ EFI_STATUS - No LPC bridge is added.<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_DEVICE_PATH_PROTOCOL *DevicePath;<br>++ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;<br>++<br>++ DevicePath = NULL;<br>++ Status = gBS->HandleProtocol (<br>++ DeviceHandle,<br>++ &gEfiDevicePathProtocolGuid,<br>++ (VOID*)&DevicePath<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++ TempDevicePath = DevicePath;<br>++<br>++ //<br>++ // Register Keyboard<br>++ //<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gPnpPs2KeyboardDeviceNode);<br>++<br>++ BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);<br>++<br>++ //<br>++ // Register COM1<br>++ //<br>++ DevicePath = TempDevicePath;<br>++ gPnp16550ComPortDeviceNode.UID = 0;<br>++<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gPnp16550ComPortDeviceNode);<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);<br>++<br>++ BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);<br>++ BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);<br>++ BdsLibUpdateConsoleVariable (VarErrorOut, DevicePath, NULL);<br>++<br>++ //<br>++ // Register COM2<br>++ //<br>++ DevicePath = TempDevicePath;<br>++ gPnp16550ComPortDeviceNode.UID = 1;<br>++<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gPnp16550ComPortDeviceNode);<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);<br>++<br>++ BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);<br>++ BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);<br>++ BdsLibUpdateConsoleVariable (VarErrorOut, DevicePath, NULL);<br>++<br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++GetGopDevicePath (<br>++ IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,<br>++ OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath<br>++ )<br>++{<br>++ UINTN Index;<br>++ EFI_STATUS Status;<br>++ EFI_HANDLE PciDeviceHandle;<br>++ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;<br>++ EFI_DEVICE_PATH_PROTOCOL *TempPciDevicePath;<br>++ UINTN GopHandleCount;<br>++ EFI_HANDLE *GopHandleBuffer;<br>++<br>++ if (PciDevicePath == NULL || GopDevicePath == NULL) {<br>++ return EFI_INVALID_PARAMETER;<br>++ }<br>++ <br>++ //<br>++ // Initialize the GopDevicePath to be PciDevicePath<br>++ //<br>++ *GopDevicePath = PciDevicePath;<br>++ TempPciDevicePath = PciDevicePath;<br>++<br>++ Status = gBS->LocateDevicePath (<br>++ &gEfiDevicePathProtocolGuid,<br>++ &TempPciDevicePath,<br>++ &PciDeviceHandle<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++<br>++ //<br>++ // Try to connect this handle, so that GOP driver could start on this <br>++ // device and create child handles with GraphicsOutput Protocol installed<br>++ // on them, then we get device paths of these child handles and select <br>++ // them as possible console device.<br>++ //<br>++ gBS->ConnectController (PciDeviceHandle, NULL, NULL, FALSE);<br>++<br>++ Status = gBS->LocateHandleBuffer (<br>++ ByProtocol,<br>++ &gEfiGraphicsOutputProtocolGuid,<br>++ NULL,<br>++ &GopHandleCount,<br>++ &GopHandleBuffer<br>++ );<br>++ if (!EFI_ERROR (Status)) {<br>++ //<br>++ // Add all the child handles as possible Console Device<br>++ //<br>++ for (Index = 0; Index < GopHandleCount; Index++) {<br>++ Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID*)&TempDevicePath);<br>++ if (EFI_ERROR (Status)) {<br>++ continue;<br>++ }<br>++ if (CompareMem (<br>++ PciDevicePath,<br>++ TempDevicePath,<br>++ GetDevicePathSize (PciDevicePath) - END_DEVICE_PATH_LENGTH<br>++ ) == 0) {<br>++ //<br>++ // In current implementation, we only enable one of the child handles<br>++ // as console device, i.e. sotre one of the child handle's device<br>++ // path to variable "ConOut"<br>++ // In future, we could select all child handles to be console device<br>++ // <br>++<br>++ *GopDevicePath = TempDevicePath;<br>++<br>++ //<br>++ // Delete the PCI device's path that added by GetPlugInPciVgaDevicePath()<br>++ // Add the integrity GOP device path.<br>++ //<br>++ BdsLibUpdateConsoleVariable (VarConsoleOutDev, NULL, PciDevicePath);<br>++ BdsLibUpdateConsoleVariable (VarConsoleOutDev, TempDevicePath, NULL);<br>++ }<br>++ }<br>++ gBS->FreePool (GopHandleBuffer);<br>++ }<br>++<br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++PreparePciVgaDevicePath (<br>++ IN EFI_HANDLE DeviceHandle<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Add PCI VGA to ConOut.<br>++ PCI VGA: 03 00 00<br>++<br>++Arguments:<br>++<br>++ DeviceHandle - Handle of PCIIO protocol.<br>++ <br>++Returns:<br>++<br>++ EFI_SUCCESS - PCI VGA is added to ConOut.<br>++ EFI_STATUS - No PCI VGA device is added.<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_DEVICE_PATH_PROTOCOL *DevicePath;<br>++ EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;<br>++<br>++ DevicePath = NULL;<br>++ GopDevicePath = NULL;<br>++ Status = gBS->HandleProtocol (<br>++ DeviceHandle,<br>++ &gEfiDevicePathProtocolGuid,<br>++ (VOID*)&DevicePath<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++ <br>++ GetGopDevicePath (DevicePath, &GopDevicePath);<br>++ DevicePath = GopDevicePath;<br>++<br>++ BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);<br>++ <br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++PreparePciSerialDevicePath (<br>++ IN EFI_HANDLE DeviceHandle<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Add PCI Serial to ConOut, ConIn, ErrOut.<br>++ PCI Serial: 07 00 02<br>++<br>++Arguments:<br>++<br>++ DeviceHandle - Handle of PCIIO protocol.<br>++ <br>++Returns:<br>++<br>++ EFI_SUCCESS - PCI Serial is added to ConOut, ConIn, and ErrOut.<br>++ EFI_STATUS - No PCI Serial device is added.<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_DEVICE_PATH_PROTOCOL *DevicePath;<br>++ <br>++ DevicePath = NULL;<br>++ Status = gBS->HandleProtocol (<br>++ DeviceHandle,<br>++ &gEfiDevicePathProtocolGuid,<br>++ (VOID*)&DevicePath<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);<br>++ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);<br>++<br>++ BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);<br>++ BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);<br>++ BdsLibUpdateConsoleVariable (VarErrorOut, DevicePath, NULL);<br>++ <br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++DetectAndPreparePlatformPciDevicePath (<br>++ BOOLEAN DetectVgaOnly<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut<br>++<br>++Arguments:<br>++<br>++ DetectVgaOnly - Only detect VGA device if it's TRUE.<br>++ <br>++Returns:<br>++<br>++ EFI_SUCCESS - PCI Device check and Console variable update successfully.<br>++ EFI_STATUS - PCI Device check or Console variable update fail.<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ UINTN HandleCount;<br>++ EFI_HANDLE *HandleBuffer;<br>++ UINTN Index;<br>++ EFI_PCI_IO_PROTOCOL *PciIo;<br>++ PCI_TYPE00 Pci;<br>++<br>++ //<br>++ // Start to check all the PciIo to find all possible device<br>++ //<br>++ HandleCount = 0;<br>++ HandleBuffer = NULL;<br>++ Status = gBS->LocateHandleBuffer (<br>++ ByProtocol,<br>++ &gEfiPciIoProtocolGuid,<br>++ NULL,<br>++ &HandleCount,<br>++ &HandleBuffer<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++<br>++ for (Index = 0; Index < HandleCount; Index++) {<br>++ Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID*)&PciIo);<br>++ if (EFI_ERROR (Status)) {<br>++ continue;<br>++ }<br>++<br>++ //<br>++ // Check for all PCI device<br>++ //<br>++ Status = PciIo->Pci.Read (<br>++ PciIo,<br>++ EfiPciIoWidthUint32,<br>++ 0,<br>++ sizeof (Pci) / sizeof (UINT32),<br>++ &Pci<br>++ );<br>++ if (EFI_ERROR (Status)) {<br>++ continue;<br>++ }<br>++<br>++ if (!DetectVgaOnly) {<br>++ //<br>++ // Here we decide whether it is LPC Bridge<br>++ //<br>++ if ((IS_PCI_LPC (&Pci)) ||<br>++ ((IS_PCI_ISA_PDECODE (&Pci)) && (Pci.Hdr.VendorId == 0x8086) && (Pci.Hdr.DeviceId == 0x7110))) {<br>++ //<br>++ // Add IsaKeyboard to ConIn,<br>++ // add IsaSerial to ConOut, ConIn, ErrOut<br>++ //<br>++ DEBUG ((EFI_D_INFO, "Find the LPC Bridge device\n"));<br>++ PrepareLpcBridgeDevicePath (HandleBuffer[Index]);<br>++ continue;<br>++ }<br>++ //<br>++ // Here we decide which Serial device to enable in PCI bus <br>++ //<br>++ if (IS_PCI_16550SERIAL (&Pci)) {<br>++ //<br>++ // Add them to ConOut, ConIn, ErrOut.<br>++ //<br>++ DEBUG ((EFI_D_INFO, "Find the 16550 SERIAL device\n"));<br>++ PreparePciSerialDevicePath (HandleBuffer[Index]);<br>++ continue;<br>++ }<br>++ }<br>++<br>++ //<br>++ // Here we decide which VGA device to enable in PCI bus <br>++ //<br>++ if (IS_PCI_VGA (&Pci)) {<br>++ //<br>++ // Add them to ConOut.<br>++ //<br>++ DEBUG ((EFI_D_INFO, "Find the VGA device\n"));<br>++ PreparePciVgaDevicePath (HandleBuffer[Index]);<br>++ continue;<br>++ }<br>++ }<br>++ <br>++ gBS->FreePool (HandleBuffer);<br>++ <br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++PlatformBdsConnectConsole (<br>++ IN BDS_CONSOLE_CONNECT_ENTRY *PlatformConsole<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Connect the predefined platform default console device. Always try to find<br>++ and enable the vga device if have.<br>++<br>++Arguments:<br>++<br>++ PlatformConsole - Predefined platform default console device array.<br>++ <br>++Returns:<br>++<br>++ EFI_SUCCESS - Success connect at least one ConIn and ConOut <br>++ device, there must have one ConOut device is <br>++ active vga device.<br>++ <br>++ EFI_STATUS - Return the status of <br>++ BdsLibConnectAllDefaultConsoles ()<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ UINTN Index;<br>++ EFI_DEVICE_PATH_PROTOCOL *VarConout;<br>++ EFI_DEVICE_PATH_PROTOCOL *VarConin;<br>++ UINTN DevicePathSize;<br>++<br>++ //<br>++ // Connect RootBridge<br>++ //<br>++ ConnectRootBridge ();<br>++<br>++ VarConout = BdsLibGetVariableAndSize (<br>++ VarConsoleOut,<br>++ &gEfiGlobalVariableGuid,<br>++ &DevicePathSize<br>++ );<br>++ VarConin = BdsLibGetVariableAndSize (<br>++ VarConsoleInp,<br>++ &gEfiGlobalVariableGuid,<br>++ &DevicePathSize<br>++ );<br>++ <br>++ if (VarConout == NULL || VarConin == NULL) {<br>++ //<br>++ // Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut<br>++ //<br>++ DetectAndPreparePlatformPciDevicePath (FALSE);<br>++<br>++ //<br>++ // Have chance to connect the platform default console,<br>++ // the platform default console is the minimum device group<br>++ // the platform should support<br>++ //<br>++ for (Index = 0; PlatformConsole[Index].DevicePath != NULL; ++Index) {<br>++ //<br>++ // Update the console variable with the connect type<br>++ //<br>++ if ((PlatformConsole[Index].ConnectType & CONSOLE_IN) == CONSOLE_IN) {<br>++ BdsLibUpdateConsoleVariable (VarConsoleInp, PlatformConsole[Index].DevicePath, NULL);<br>++ }<br>++ if ((PlatformConsole[Index].ConnectType & CONSOLE_OUT) == CONSOLE_OUT) {<br>++ BdsLibUpdateConsoleVariable (VarConsoleOut, PlatformConsole[Index].DevicePath, NULL);<br>++ }<br>++ if ((PlatformConsole[Index].ConnectType & STD_ERROR) == STD_ERROR) {<br>++ BdsLibUpdateConsoleVariable (VarErrorOut, PlatformConsole[Index].DevicePath, NULL);<br>++ }<br>++ }<br>++ } else {<br>++ //<br>++ // Only detect VGA device and add them to ConOut<br>++ //<br>++ DetectAndPreparePlatformPciDevicePath (TRUE);<br>++ }<br>++ <br>++ //<br>++ // The ConIn devices connection will start the USB bus, should disable all<br>++ // Usb legacy support firstly.<br>++ // Caution: Must ensure the PCI bus driver has been started. Since the <br>++ // ConnectRootBridge() will create all the PciIo protocol, it's safe here now<br>++ //<br>++ Status = DisableUsbLegacySupport();<br>++ <br>++ //<br>++ // Connect the all the default console with current cosole variable<br>++ //<br>++ Status = BdsLibConnectAllDefaultConsoles ();<br>++ if (EFI_ERROR (Status)) {<br>++ return Status;<br>++ }<br>++<br>++ return EFI_SUCCESS;<br>++}<br>++<br>++VOID<br>++PlatformBdsConnectSequence (<br>++ VOID<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Connect with predefined platform connect sequence,<br>++ the OEM/IBV can customize with their own connect sequence.<br>++ <br>++Arguments:<br>++<br>++ None.<br>++ <br>++Returns:<br>++<br>++ None.<br>++ <br>++--*/<br>++{<br>++ UINTN Index;<br>++<br>++ Index = 0;<br>++<br>++ //<br>++ // Here we can get the customized platform connect sequence<br>++ // Notes: we can connect with new variable which record the<br>++ // last time boots connect device path sequence<br>++ //<br>++ while (gPlatformConnectSequence[Index] != NULL) {<br>++ //<br>++ // Build the platform boot option<br>++ //<br>++ BdsLibConnectDevicePath (gPlatformConnectSequence[Index]);<br>++ Index++;<br>++ }<br>++<br>++}<br>++<br>++VOID<br>++PlatformBdsGetDriverOption (<br>++ IN OUT LIST_ENTRY *BdsDriverLists<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Load the predefined driver option, OEM/IBV can customize this<br>++ to load their own drivers<br>++ <br>++Arguments:<br>++<br>++ BdsDriverLists - The header of the driver option link list.<br>++ <br>++Returns:<br>++<br>++ None.<br>++ <br>++--*/<br>++{<br>++ UINTN Index;<br>++<br>++ Index = 0;<br>++<br>++ //<br>++ // Here we can get the customized platform driver option<br>++ //<br>++ while (gPlatformDriverOption[Index] != NULL) {<br>++ //<br>++ // Build the platform boot option<br>++ //<br>++ BdsLibRegisterNewOption (BdsDriverLists, gPlatformDriverOption[Index], NULL, L"DriverOrder");<br>++ Index++;<br>++ }<br>++<br>++}<br>++<br>++VOID<br>++PlatformBdsDiagnostics (<br>++ IN EXTENDMEM_COVERAGE_LEVEL MemoryTestLevel,<br>++ IN BOOLEAN QuietBoot,<br>++ IN BASEM_MEMORY_TEST BaseMemoryTest<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Perform the platform diagnostic, such like test memory. OEM/IBV also<br>++ can customize this fuction to support specific platform diagnostic.<br>++ <br>++Arguments:<br>++<br>++ MemoryTestLevel - The memory test intensive level<br>++ <br>++ QuietBoot - Indicate if need to enable the quiet boot<br>++<br>++ BaseMemoryTest - A pointer to BdsMemoryTest()<br>++ <br>++Returns:<br>++<br>++ None.<br>++ <br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++<br>++ //<br>++ // Here we can decide if we need to show<br>++ // the diagnostics screen<br>++ // Notes: this quiet boot code should be remove<br>++ // from the graphic lib<br>++ //<br>++ if (QuietBoot) {<br>++ Status = EnableQuietBoot (PcdGetPtr(PcdLogoFile));<br>++ if (EFI_ERROR (Status)) {<br>++ DisableQuietBoot ();<br>++ return;<br>++ }<br>++<br>++ //<br>++ // Perform system diagnostic<br>++ //<br>++ Status = BaseMemoryTest (MemoryTestLevel);<br>++ if (EFI_ERROR (Status)) {<br>++ DisableQuietBoot ();<br>++ }<br>++<br>++ return ;<br>++ }<br>++ //<br>++ // Perform system diagnostic<br>++ //<br>++ Status = BaseMemoryTest (MemoryTestLevel);<br>++}<br>++<br>++VOID<br>++EFIAPI<br>++PlatformBdsPolicyBehavior (<br>++ IN OUT LIST_ENTRY *DriverOptionList,<br>++ IN OUT LIST_ENTRY *BootOptionList,<br>++ IN PROCESS_CAPSULES ProcessCapsules,<br>++ IN BASEM_MEMORY_TEST BaseMemoryTest<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ The function will execute with as the platform policy, current policy<br>++ is driven by boot mode. IBV/OEM can customize this code for their specific<br>++ policy action.<br>++ <br>++Arguments:<br>++<br>++ DriverOptionList - The header of the driver option link list<br>++ <br>++ BootOptionList - The header of the boot option link list<br>++ <br>++Returns:<br>++<br>++ None.<br>++ <br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ UINT16 Timeout;<br>++ EFI_EVENT UserInputDurationTime;<br>++ UINTN Index;<br>++ EFI_INPUT_KEY Key;<br>++ EFI_BOOT_MODE BootMode;<br>++<br>++ //<br>++ // Init the time out value<br>++ //<br>++ Timeout = PcdGet16 (PcdPlatformBootTimeOut);<br>++<br>++ //<br>++ // Load the driver option as the driver option list<br>++ //<br>++ PlatformBdsGetDriverOption (DriverOptionList);<br>++<br>++ //<br>++ // Get current Boot Mode<br>++ //<br>++ Status = BdsLibGetBootMode (&BootMode);<br>++ DEBUG ((EFI_D_ERROR, "Boot Mode:%x\n", BootMode));<br>++<br>++ //<br>++ // Go the different platform policy with different boot mode<br>++ // Notes: this part code can be change with the table policy<br>++ //<br>++ ASSERT (BootMode == BOOT_WITH_FULL_CONFIGURATION);<br>++ //<br>++ // Connect platform console<br>++ //<br>++ Status = PlatformBdsConnectConsole (gPlatformConsole);<br>++ if (EFI_ERROR (Status)) {<br>++ //<br>++ // Here OEM/IBV can customize with defined action<br>++ //<br>++ PlatformBdsNoConsoleAction ();<br>++ }<br>++ //<br>++ // Create a 300ms duration event to ensure user has enough input time to enter Setup<br>++ //<br>++ Status = gBS->CreateEvent (<br>++ EVT_TIMER,<br>++ 0,<br>++ NULL,<br>++ NULL,<br>++ &UserInputDurationTime<br>++ );<br>++ ASSERT (Status == EFI_SUCCESS);<br>++ Status = gBS->SetTimer (UserInputDurationTime, TimerRelative, 3000000);<br>++ ASSERT (Status == EFI_SUCCESS);<br>++ //<br>++ // Memory test and Logo show<br>++ //<br>++ PlatformBdsDiagnostics (IGNORE, TRUE, BaseMemoryTest);<br>++<br>++ //<br>++ // Perform some platform specific connect sequence<br>++ //<br>++ PlatformBdsConnectSequence ();<br>++<br>++ //<br>++ // Give one chance to enter the setup if we<br>++ // have the time out<br>++ //<br>++ // BUGBUG: hard code timeout to 5 second to show logo in graphic mode.<br>++ Timeout = 5; <br>++ if (Timeout != 0) {<br>++ PlatformBdsEnterFrontPage (Timeout, FALSE);<br>++ }<br>++<br>++ //<br>++ //BdsLibConnectAll ();<br>++ //BdsLibEnumerateAllBootOption (BootOptionList); <br>++ <br>++ //<br>++ // Please uncomment above ConnectAll and EnumerateAll code and remove following first boot<br>++ // checking code in real production tip.<br>++ // <br>++ // In BOOT_WITH_FULL_CONFIGURATION boot mode, should always connect every device <br>++ // and do enumerate all the default boot options. But in development system board, the boot mode <br>++ // cannot be BOOT_ASSUMING_NO_CONFIGURATION_CHANGES because the machine box<br>++ // is always open. So the following code only do the ConnectAll and EnumerateAll at first boot.<br>++ //<br>++ Status = BdsLibBuildOptionFromVar (BootOptionList, L"BootOrder");<br>++ if (EFI_ERROR(Status)) {<br>++ //<br>++ // If cannot find "BootOrder" variable, it may be first boot. <br>++ // Try to connect all devices and enumerate all boot options here.<br>++ //<br>++ BdsLibConnectAll ();<br>++ BdsLibEnumerateAllBootOption (BootOptionList);<br>++ } <br>++<br>++ //<br>++ // To give the User a chance to enter Setup here, if user set TimeOut is 0.<br>++ // BDS should still give user a chance to enter Setup<br>++ // Check whether the user input after the duration time has expired <br>++ //<br>++ gBS->WaitForEvent (1, &UserInputDurationTime, &Index);<br>++ gBS->CloseEvent (UserInputDurationTime);<br>++ Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);<br>++ <br>++ if (!EFI_ERROR (Status)) {<br>++ //<br>++ // Enter Setup if user input <br>++ //<br>++ Timeout = 0xffff;<br>++ PlatformBdsEnterFrontPage (Timeout, FALSE);<br>++ }<br>++ <br>++ return ;<br>++<br>++}<br>++<br>++VOID<br>++EFIAPI<br>++PlatformBdsBootSuccess (<br>++ IN BDS_COMMON_OPTION *Option<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ <br>++ Hook point after a boot attempt succeeds. We don't expect a boot option to<br>++ return, so the EFI 1.0 specification defines that you will default to an<br>++ interactive mode and stop processing the BootOrder list in this case. This<br>++ is alos a platform implementation and can be customized by IBV/OEM.<br>++<br>++Arguments:<br>++<br>++ Option - Pointer to Boot Option that succeeded to boot.<br>++<br>++Returns:<br>++ <br>++ None.<br>++<br>++--*/<br>++{<br>++ CHAR16 *TmpStr;<br>++<br>++ //<br>++ // If Boot returned with EFI_SUCCESS and there is not in the boot device<br>++ // select loop then we need to pop up a UI and wait for user input.<br>++ //<br>++ TmpStr = Option->StatusString;<br>++ if (TmpStr != NULL) {<br>++ BdsLibOutputStrings (gST->ConOut, TmpStr, Option->Description, L"\n\r", NULL);<br>++ gBS->FreePool (TmpStr);<br>++ }<br>++}<br>++<br>++VOID<br>++EFIAPI<br>++PlatformBdsBootFail (<br>++ IN BDS_COMMON_OPTION *Option,<br>++ IN EFI_STATUS Status,<br>++ IN CHAR16 *ExitData,<br>++ IN UINTN ExitDataSize<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ <br>++ Hook point after a boot attempt fails.<br>++<br>++Arguments:<br>++ <br>++ Option - Pointer to Boot Option that failed to boot.<br>++<br>++ Status - Status returned from failed boot.<br>++<br>++ ExitData - Exit data returned from failed boot.<br>++<br>++ ExitDataSize - Exit data size returned from failed boot.<br>++<br>++Returns:<br>++ <br>++ None.<br>++<br>++--*/<br>++{<br>++ CHAR16 *TmpStr;<br>++<br>++ //<br>++ // If Boot returned with failed status then we need to pop up a UI and wait<br>++ // for user input.<br>++ //<br>++ TmpStr = Option->StatusString;<br>++ if (TmpStr != NULL) {<br>++ BdsLibOutputStrings (gST->ConOut, TmpStr, Option->Description, L"\n\r", NULL);<br>++ gBS->FreePool (TmpStr);<br>++ }<br>++<br>++}<br>++<br>++EFI_STATUS<br>++PlatformBdsNoConsoleAction (<br>++ VOID<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ <br>++ This function is remained for IBV/OEM to do some platform action,<br>++ if there no console device can be connected.<br>++<br>++Arguments:<br>++ <br>++ None.<br>++ <br>++Returns:<br>++ <br>++ EFI_SUCCESS - Direct return success now.<br>++<br>++--*/<br>++{<br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++ConvertSystemTable (<br>++ IN EFI_GUID *TableGuid,<br>++ IN OUT VOID **Table<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ Convert ACPI Table /Smbios Table /MP Table if its location is lower than Address:0x100000<br>++ Assumption here:<br>++ As in legacy Bios, ACPI/Smbios/MP table is required to place in E/F Seg, <br>++ So here we just check if the range is E/F seg, <br>++ and if Not, assume the Memory type is EfiACPIReclaimMemory/EfiACPIMemoryNVS<br>++<br>++Arguments:<br>++ TableGuid - Guid of the table<br>++ Table - pointer to the table <br>++<br>++Returns:<br>++ EFI_SUCEESS - Convert Table successfully<br>++ Other - Failed<br>++<br>++--*/<br>++{<br>++ EFI_STATUS Status;<br>++ VOID *AcpiHeader;<br>++ UINTN AcpiTableLen;<br>++ <br>++ //<br>++ // If match acpi guid (1.0, 2.0, or later), Convert ACPI table according to version. <br>++ //<br>++ AcpiHeader = (VOID*)(UINTN)(*(UINT64 *)(*Table));<br>++ <br>++ if (CompareGuid(TableGuid, &gEfiAcpiTableGuid) || CompareGuid(TableGuid, &gEfiAcpi20TableGuid)){<br>++ if (((EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)AcpiHeader)->Reserved == 0x00){<br>++ //<br>++ // If Acpi 1.0 Table, then RSDP structure doesn't contain Length field, use structure size<br>++ //<br>++ AcpiTableLen = sizeof (EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER);<br>++ } else if (((EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)AcpiHeader)->Reserved >= 0x02){<br>++ //<br>++ // If Acpi 2.0 or later, use RSDP Length fied.<br>++ //<br>++ AcpiTableLen = ((EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)AcpiHeader)->Length;<br>++ } else {<br>++ //<br>++ // Invalid Acpi Version, return<br>++ //<br>++ return EFI_UNSUPPORTED;<br>++ }<br>++ Status = ConvertAcpiTable (AcpiTableLen, Table);<br>++ return Status; <br>++ }<br>++ <br>++ //<br>++ // If matches smbios guid, convert Smbios table.<br>++ //<br>++ if (CompareGuid(TableGuid, &gEfiSmbiosTableGuid)){<br>++ Status = ConvertSmbiosTable (Table);<br>++ return Status;<br>++ }<br>++ <br>++ //<br>++ // If the table is MP table?<br>++ //<br>++ if (CompareGuid(TableGuid, &gEfiMpsTableGuid)){<br>++ Status = ConvertMpsTable (Table);<br>++ return Status;<br>++ }<br>++ <br>++ return EFI_UNSUPPORTED;<br>++} <br>++<br>++<br>++EFI_STATUS<br>++ConvertAcpiTable (<br>++ IN UINTN TableLen,<br>++ IN OUT VOID **Table<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++ Convert RSDP of ACPI Table if its location is lower than Address:0x100000<br>++ Assumption here:<br>++ As in legacy Bios, ACPI table is required to place in E/F Seg, <br>++ So here we just check if the range is E/F seg, <br>++ and if Not, assume the Memory type is EfiACPIReclaimMemory/EfiACPIMemoryNVS<br>++<br>++Arguments:<br>++ TableLen - Acpi RSDP length<br>++ Table - pointer to the table <br>++<br>++Returns:<br>++ EFI_SUCEESS - Convert Table successfully<br>++ Other - Failed<br>++<br>++--*/<br>++{<br>++ VOID *AcpiTableOri;<br>++ VOID *AcpiTableNew;<br>++ EFI_STATUS Status;<br>++ EFI_PHYSICAL_ADDRESS BufferPtr;<br>++<br>++ <br>++ AcpiTableOri = (VOID *)(UINTN)(*(UINT64*)(*Table));<br>++ if (((UINTN)AcpiTableOri < 0x100000) && ((UINTN)AcpiTableOri > 0xE0000)) {<br>++ BufferPtr = EFI_SYSTEM_TABLE_MAX_ADDRESS;<br>++ Status = gBS->AllocatePages (<br>++ AllocateMaxAddress,<br>++ EfiACPIMemoryNVS,<br>++ EFI_SIZE_TO_PAGES(TableLen),<br>++ &BufferPtr<br>++ );<br>++ ASSERT_EFI_ERROR (Status);<br>++ AcpiTableNew = (VOID *)(UINTN)BufferPtr;<br>++ CopyMem (AcpiTableNew, AcpiTableOri, TableLen);<br>++ } else {<br>++ AcpiTableNew = AcpiTableOri;<br>++ }<br>++ //<br>++ // Change configuration table Pointer<br>++ //<br>++ *Table = AcpiTableNew;<br>++ <br>++ return EFI_SUCCESS;<br>++}<br>++<br>++EFI_STATUS<br>++ConvertSmbiosTable (<br>++ IN OUT VOID **Table<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Convert Smbios Table if the Location of the SMBios Table is lower than Addres 0x100000<br>++ Assumption here:<br>++ As in legacy Bios, Smbios table is required to place in E/F Seg, <br>++ So here we just check if the range is F seg, <br>++ and if Not, assume the Memory type is EfiACPIMemoryNVS/EfiRuntimeServicesData<br>++Arguments:<br>++ Table - pointer to the table<br>++<br>++Returns:<br>++ EFI_SUCEESS - Convert Table successfully<br>++ Other - Failed<br>++<br>++--*/<br>++{<br>++ SMBIOS_TABLE_ENTRY_POINT *SmbiosTableNew;<br>++ SMBIOS_TABLE_ENTRY_POINT *SmbiosTableOri;<br>++ EFI_STATUS Status;<br>++ UINT32 SmbiosEntryLen;<br>++ UINT32 BufferLen;<br>++ EFI_PHYSICAL_ADDRESS BufferPtr;<br>++ <br>++ SmbiosTableNew = NULL;<br>++ SmbiosTableOri = NULL;<br>++ <br>++ //<br>++ // Get Smibos configuration Table <br>++ //<br>++ SmbiosTableOri = (SMBIOS_TABLE_ENTRY_POINT *)(UINTN)(*(UINT64*)(*Table));<br>++ <br>++ if ((SmbiosTableOri == NULL) ||<br>++ ((UINTN)SmbiosTableOri > 0x100000) ||<br>++ ((UINTN)SmbiosTableOri < 0xF0000)){<br>++ return EFI_SUCCESS;<br>++ }<br>++ //<br>++ // Relocate the Smibos memory<br>++ //<br>++ BufferPtr = EFI_SYSTEM_TABLE_MAX_ADDRESS;<br>++ if (SmbiosTableOri->SmbiosBcdRevision != 0x21) {<br>++ SmbiosEntryLen = SmbiosTableOri->EntryPointLength;<br>++ } else {<br>++ //<br>++ // According to Smbios Spec 2.4, we should set entry point length as 0x1F if version is 2.1<br>++ //<br>++ SmbiosEntryLen = 0x1F;<br>++ }<br>++ BufferLen = SmbiosEntryLen + SYS_TABLE_PAD(SmbiosEntryLen) + SmbiosTableOri->TableLength;<br>++ Status = gBS->AllocatePages (<br>++ AllocateMaxAddress,<br>++ EfiACPIMemoryNVS,<br>++ EFI_SIZE_TO_PAGES(BufferLen),<br>++ &BufferPtr<br>++ );<br>++ ASSERT_EFI_ERROR (Status);<br>++ SmbiosTableNew = (SMBIOS_TABLE_ENTRY_POINT *)(UINTN)BufferPtr;<br>++ CopyMem (<br>++ SmbiosTableNew, <br>++ SmbiosTableOri,<br>++ SmbiosEntryLen<br>++ );<br>++ // <br>++ // Get Smbios Structure table address, and make sure the start address is 32-bit align<br>++ //<br>++ BufferPtr += SmbiosEntryLen + SYS_TABLE_PAD(SmbiosEntryLen);<br>++ CopyMem (<br>++ (VOID *)(UINTN)BufferPtr, <br>++ (VOID *)(UINTN)(SmbiosTableOri->TableAddress),<br>++ SmbiosTableOri->TableLength<br>++ );<br>++ SmbiosTableNew->TableAddress = (UINT32)BufferPtr;<br>++ SmbiosTableNew->IntermediateChecksum = 0;<br>++ SmbiosTableNew->IntermediateChecksum = <br>++ CalculateCheckSum8 ((UINT8*)SmbiosTableNew + 0x10, SmbiosEntryLen -0x10);<br>++ //<br>++ // Change the SMBIOS pointer<br>++ //<br>++ *Table = SmbiosTableNew;<br>++ <br>++ return EFI_SUCCESS; <br>++} <br>++<br>++EFI_STATUS<br>++ConvertMpsTable (<br>++ IN OUT VOID **Table<br>++ )<br>++/*++<br>++<br>++Routine Description:<br>++<br>++ Convert MP Table if the Location of the SMBios Table is lower than Addres 0x100000<br>++ Assumption here:<br>++ As in legacy Bios, MP table is required to place in E/F Seg, <br>++ So here we just check if the range is E/F seg, <br>++ and if Not, assume the Memory type is EfiACPIMemoryNVS/EfiRuntimeServicesData<br>++Arguments:<br>++ Table - pointer to the table<br>++<br>++Returns:<br>++ EFI_SUCEESS - Convert Table successfully<br>++ Other - Failed<br>++<br>++--*/<br>++{<br>++ UINT32 Data32;<br>++ UINT32 FPLength;<br>++ EFI_LEGACY_MP_TABLE_FLOATING_POINTER *MpsFloatingPointerOri;<br>++ EFI_LEGACY_MP_TABLE_FLOATING_POINTER *MpsFloatingPointerNew;<br>++ EFI_LEGACY_MP_TABLE_HEADER *MpsTableOri;<br>++ EFI_LEGACY_MP_TABLE_HEADER *MpsTableNew;<br>++ VOID *OemTableOri;<br>++ VOID *OemTableNew;<br>++ EFI_STATUS Status;<br>++ EFI_PHYSICAL_ADDRESS BufferPtr;<br>++ <br>++ //<br>++ // Get MP configuration Table <br>++ //<br>++ MpsFloatingPointerOri = (EFI_LEGACY_MP_TABLE_FLOATING_POINTER *)(UINTN)(*(UINT64*)(*Table));<br>++ if (!(((UINTN)MpsFloatingPointerOri <= 0x100000) && <br>++ ((UINTN)MpsFloatingPointerOri >= 0xF0000))){<br>++ return EFI_SUCCESS;<br>++ }<br>++ //<br>++ // Get Floating pointer structure length<br>++ //<br>++ FPLength = MpsFloatingPointerOri->Length * 16;<br>++ Data32 = FPLength + SYS_TABLE_PAD (FPLength);<br>++ MpsTableOri = (EFI_LEGACY_MP_TABLE_HEADER *)(UINTN)(MpsFloatingPointerOri->PhysicalAddress);<br>++ if (MpsTableOri != NULL) {<br>++ Data32 += MpsTableOri->BaseTableLength;<br>++ Data32 += MpsTableOri->ExtendedTableLength;<br>++ if (MpsTableOri->OemTablePointer != 0x00) {<br>++ Data32 += SYS_TABLE_PAD (Data32);<br>++ Data32 += MpsTableOri->OemTableSize;<br>++ }<br>++ } else {<br>++ return EFI_SUCCESS;<br>++ }<br>++ //<br>++ // Relocate memory<br>++ //<br>++ BufferPtr = EFI_SYSTEM_TABLE_MAX_ADDRESS;<br>++ Status = gBS->AllocatePages (<br>++ AllocateMaxAddress,<br>++ EfiACPIMemoryNVS,<br>++ EFI_SIZE_TO_PAGES(Data32),<br>++ &BufferPtr<br>++ );<br>++ ASSERT_EFI_ERROR (Status); <br>++ MpsFloatingPointerNew = (EFI_LEGACY_MP_TABLE_FLOATING_POINTER *)(UINTN)BufferPtr;<br>++ CopyMem (MpsFloatingPointerNew, MpsFloatingPointerOri, FPLength);<br>++ //<br>++ // If Mp Table exists<br>++ //<br>++ if (MpsTableOri != NULL) {<br>++ //<br>++ // Get Mps table length, including Ext table<br>++ //<br>++ BufferPtr = BufferPtr + FPLength + SYS_TABLE_PAD (FPLength);<br>++ MpsTableNew = (EFI_LEGACY_MP_TABLE_HEADER *)(UINTN)BufferPtr;<br>++ CopyMem (MpsTableNew, MpsTableOri, MpsTableOri->BaseTableLength + MpsTableOri->ExtendedTableLength);<br>++ <br>++ if ((MpsTableOri->OemTableSize != 0x0000) && (MpsTableOri->OemTablePointer != 0x0000)){<br>++ BufferPtr += MpsTableOri->BaseTableLength + MpsTableOri->ExtendedTableLength;<br>++ BufferPtr += SYS_TABLE_PAD (BufferPtr);<br>++ OemTableNew = (VOID *)(UINTN)BufferPtr;<br>++ OemTableOri = (VOID *)(UINTN)MpsTableOri->OemTablePointer;<br>++ CopyMem (OemTableNew, OemTableOri, MpsTableOri->OemTableSize);<br>++ MpsTableNew->OemTablePointer = (UINT32)(UINTN)OemTableNew;<br>++ }<br>++ MpsTableNew->Checksum = 0;<br>++ MpsTableNew->Checksum = CalculateCheckSum8 ((UINT8*)MpsTableNew, MpsTableOri->BaseTableLength);<br>++ MpsFloatingPointerNew->PhysicalAddress = (UINT32)(UINTN)MpsTableNew;<br>++ MpsFloatingPointerNew->Checksum = 0;<br>++ MpsFloatingPointerNew->Checksum = CalculateCheckSum8 ((UINT8*)MpsFloatingPointerNew, FPLength);<br>++ }<br>++ //<br>++ // Change the pointer<br>++ //<br>++ *Table = MpsFloatingPointerNew;<br>++ <br>++ return EFI_SUCCESS; <br>++} <br>++ <br>++/**<br>++ Lock the ConsoleIn device in system table. All key<br>++ presses will be ignored until the Password is typed in. The only way to<br>++ disable the password is to type it in to a ConIn device.<br>++<br>++ @param Password Password used to lock ConIn device.<br>++<br>++ @retval EFI_SUCCESS lock the Console In Spliter virtual handle successfully.<br>++ @retval EFI_UNSUPPORTED Password not found<br>++<br>++**/<br>++EFI_STATUS<br>++EFIAPI<br>++LockKeyboards (<br>++ IN CHAR16 *Password<br>++ )<br>++{<br>++ return EFI_UNSUPPORTED;<br>++}<br>++<br>++/**<br>++ This function locks platform flash that is not allowed to be updated during normal boot path.<br>++ The flash layout is platform specific.<br>++<br>++ **/<br>++VOID<br>++EFIAPI<br>++PlatformBdsLockNonUpdatableFlash (<br>++ VOID<br>++ )<br>++{<br>++ return;<br>++}<br>+diff --git a/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.h b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.h<br>+new file mode 100644<br>+index 0000000000..d447f77747<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.h<br>+@@ -0,0 +1,288 @@<br>++/*++<br>++<br>++Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR><br>++This program and the accompanying materials <br>++are licensed and made available under the terms and conditions of the BSD License <br>++which accompanies this distribution. The full text of the license may be found at <br>++http://opensource.org/licenses/bsd-license.php <br>++ <br>++THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++<br>++Module Name: <br>++<br>++ BdsPlatform.h<br>++<br>++Abstract:<br>++<br>++ Head file for BDS Platform specific code<br>++<br>++--*/<br>++<br>++#ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_<br>++#define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_<br>++<br>++<br>++#include <PiDxe.h><br>++<br>++#include <IndustryStandard/Pci.h><br>++#include <IndustryStandard/Acpi.h><br>++#include <IndustryStandard/SmBios.h><br>++#include <IndustryStandard/LegacyBiosMpTable.h><br>++<br>++#include <Library/DebugLib.h><br>++#include <Library/BaseMemoryLib.h><br>++#include <Library/UefiBootServicesTableLib.h><br>++#include <Library/MemoryAllocationLib.h><br>++#include <Library/BaseLib.h><br>++#include <Library/PcdLib.h><br>++#include <Library/GenericBdsLib.h><br>++#include <Library/PlatformBdsLib.h><br>++#include <Library/HobLib.h><br>++#include <Library/UefiLib.h><br>++#include <Library/DxeServicesTableLib.h><br>++#include <Library/DevicePathLib.h><br>++<br>++#include <Protocol/PciIo.h><br>++<br>++#include <Guid/Acpi.h><br>++#include <Guid/SmBios.h><br>++#include <Guid/Mps.h><br>++#include <Guid/HobList.h><br>++#include <Guid/PciExpressBaseAddress.h><br>++#include <Guid/GlobalVariable.h><br>++#include <Guid/LdrMemoryDescriptor.h><br>++<br>++extern BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[];<br>++extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[];<br>++extern EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[];<br>++extern EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[];<br>++extern ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode;<br>++extern ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode;<br>++extern UART_DEVICE_PATH gUartDeviceNode;<br>++extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;<br>++//<br>++//<br>++//<br>++#define VarConsoleInpDev L"ConInDev"<br>++#define VarConsoleInp L"ConIn"<br>++#define VarConsoleOutDev L"ConOutDev"<br>++#define VarConsoleOut L"ConOut"<br>++#define VarErrorOutDev L"ErrOutDev"<br>++#define VarErrorOut L"ErrOut"<br>++<br>++#define PCI_DEVICE_PATH_NODE(Func, Dev) \<br>++ { \<br>++ { \<br>++ HARDWARE_DEVICE_PATH, \<br>++ HW_PCI_DP, \<br>++ { \<br>++ (UINT8) (sizeof (PCI_DEVICE_PATH)), \<br>++ (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \<br>++ } \<br>++ }, \<br>++ (Func), \<br>++ (Dev) \<br>++ }<br>++<br>++#define PNPID_DEVICE_PATH_NODE(PnpId) \<br>++ { \<br>++ { \<br>++ ACPI_DEVICE_PATH, \<br>++ ACPI_DP, \<br>++ { \<br>++ (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \<br>++ (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \<br>++ } \<br>++ }, \<br>++ EISA_PNP_ID((PnpId)), \<br>++ 0 \<br>++ }<br>++<br>++#define gPciRootBridge \<br>++ PNPID_DEVICE_PATH_NODE(0x0A03)<br>++<br>++#define gPciIsaBridge \<br>++ PCI_DEVICE_PATH_NODE(0, 0x1f)<br>++<br>++#define gP2PBridge \<br>++ PCI_DEVICE_PATH_NODE(0, 0x1e)<br>++<br>++#define gPnpPs2Keyboard \<br>++ PNPID_DEVICE_PATH_NODE(0x0303)<br>++<br>++#define gPnp16550ComPort \<br>++ PNPID_DEVICE_PATH_NODE(0x0501)<br>++<br>++#define gUart \<br>++ { \<br>++ { \<br>++ MESSAGING_DEVICE_PATH, \<br>++ MSG_UART_DP, \<br>++ { \<br>++ (UINT8) (sizeof (UART_DEVICE_PATH)), \<br>++ (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \<br>++ } \<br>++ }, \<br>++ 0, \<br>++ 115200, \<br>++ 8, \<br>++ 1, \<br>++ 1 \<br>++ }<br>++<br>++#define gPcAnsiTerminal \<br>++ { \<br>++ { \<br>++ MESSAGING_DEVICE_PATH, \<br>++ MSG_VENDOR_DP, \<br>++ { \<br>++ (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \<br>++ (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \<br>++ } \<br>++ }, \<br>++ DEVICE_PATH_MESSAGING_PC_ANSI \<br>++ }<br>++<br>++#define gEndEntire \<br>++ { \<br>++ END_DEVICE_PATH_TYPE, \<br>++ END_ENTIRE_DEVICE_PATH_SUBTYPE, \<br>++ { \<br>++ END_DEVICE_PATH_LENGTH, \<br>++ 0 \<br>++ } \<br>++ }<br>++<br>++#define PCI_CLASS_SCC 0x07<br>++#define PCI_SUBCLASS_SERIAL 0x00<br>++#define PCI_IF_16550 0x02<br>++#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)<br>++<br>++#define EFI_SYSTEM_TABLE_MAX_ADDRESS 0xFFFFFFFF<br>++#define SYS_TABLE_PAD(ptr) (((~ptr) +1) & 0x07 )<br>++//<br>++// Platform Root Bridge<br>++//<br>++typedef struct {<br>++ ACPI_HID_DEVICE_PATH PciRootBridge;<br>++ EFI_DEVICE_PATH_PROTOCOL End;<br>++} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;<br>++<br>++typedef struct {<br>++ ACPI_HID_DEVICE_PATH PciRootBridge;<br>++ PCI_DEVICE_PATH IsaBridge;<br>++ ACPI_HID_DEVICE_PATH Keyboard;<br>++ EFI_DEVICE_PATH_PROTOCOL End;<br>++} PLATFORM_DUMMY_ISA_KEYBOARD_DEVICE_PATH;<br>++<br>++typedef struct {<br>++ ACPI_HID_DEVICE_PATH PciRootBridge;<br>++ PCI_DEVICE_PATH IsaBridge;<br>++ ACPI_HID_DEVICE_PATH IsaSerial;<br>++ UART_DEVICE_PATH Uart;<br>++ VENDOR_DEVICE_PATH TerminalType;<br>++ EFI_DEVICE_PATH_PROTOCOL End;<br>++} PLATFORM_DUMMY_ISA_SERIAL_DEVICE_PATH;<br>++<br>++typedef struct {<br>++ ACPI_HID_DEVICE_PATH PciRootBridge;<br>++ PCI_DEVICE_PATH VgaDevice;<br>++ EFI_DEVICE_PATH_PROTOCOL End;<br>++} PLATFORM_DUMMY_PCI_VGA_DEVICE_PATH;<br>++<br>++typedef struct {<br>++ ACPI_HID_DEVICE_PATH PciRootBridge;<br>++ PCI_DEVICE_PATH PciBridge;<br>++ PCI_DEVICE_PATH SerialDevice;<br>++ UART_DEVICE_PATH Uart;<br>++ VENDOR_DEVICE_PATH TerminalType;<br>++ EFI_DEVICE_PATH_PROTOCOL End;<br>++} PLATFORM_DUMMY_PCI_SERIAL_DEVICE_PATH;<br>++<br>++//<br>++// the short form device path for Usb keyboard<br>++//<br>++#define CLASS_HID 3<br>++#define SUBCLASS_BOOT 1<br>++#define PROTOCOL_KEYBOARD 1<br>++<br>++typedef struct {<br>++ USB_CLASS_DEVICE_PATH UsbClass;<br>++ EFI_DEVICE_PATH_PROTOCOL End;<br>++} USB_CLASS_FORMAT_DEVICE_PATH; <br>++<br>++extern PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0;<br>++<br>++//<br>++// Platform BDS Functions<br>++//<br>++VOID<br>++PlatformBdsGetDriverOption (<br>++ IN LIST_ENTRY *BdsDriverLists<br>++ );<br>++<br>++EFI_STATUS<br>++BdsMemoryTest (<br>++ EXTENDMEM_COVERAGE_LEVEL Level<br>++ );<br>++<br>++EFI_STATUS<br>++PlatformBdsShowProgress (<br>++ EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,<br>++ EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,<br>++ CHAR16 *Title,<br>++ EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,<br>++ UINTN Progress,<br>++ UINTN PreviousValue<br>++ );<br>++<br>++VOID<br>++PlatformBdsConnectSequence (<br>++ VOID<br>++ );<br>++<br>++EFI_STATUS<br>++ProcessCapsules (<br>++ EFI_BOOT_MODE BootMode<br>++ );<br>++<br>++EFI_STATUS<br>++PlatformBdsConnectConsole (<br>++ IN BDS_CONSOLE_CONNECT_ENTRY *PlatformConsole<br>++ );<br>++<br>++EFI_STATUS<br>++PlatformBdsNoConsoleAction (<br>++ VOID<br>++ );<br>++<br>++EFI_STATUS<br>++ConvertMpsTable (<br>++ IN OUT VOID **Table<br>++ );<br>++ <br>++EFI_STATUS<br>++ConvertSmbiosTable (<br>++ IN OUT VOID **Table<br>++ );<br>++ <br>++EFI_STATUS<br>++ConvertAcpiTable (<br>++ IN UINTN TableLen,<br>++ IN OUT VOID **Table<br>++ );<br>++<br>++EFI_STATUS<br>++ConvertSystemTable (<br>++ IN EFI_GUID *TableGuid,<br>++ IN OUT VOID **Table<br>++ );<br>++<br>++VOID<br>++PlatformBdsEnterFrontPage (<br>++ IN UINT16 TimeoutDefault,<br>++ IN BOOLEAN ConnectAllHappened<br>++ );<br>++<br>++#endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_<br>+diff --git a/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf b/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+new file mode 100644<br>+index 0000000000..578c74afae<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+@@ -0,0 +1,65 @@<br>++## @file<br>++#<br>++# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR><br>++# This program and the accompanying materials <br>++# are licensed and made available under the terms and conditions of the BSD License <br>++# which accompanies this distribution. The full text of the license may be found at <br>++# http://opensource.org/licenses/bsd-license.php <br>++# <br>++# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++# <br>++# Module Name:<br>++#<br>++# PlatformBds.inf<br>++#<br>++# Abstract:<br>++#<br>++# Component description file for Bds module.<br>++#<br>++##<br>++<br>++[Defines]<br>++ INF_VERSION = 0x00010005<br>++ BASE_NAME = CorebootBds<br>++ FILE_GUID = A6F691AC-31C8-4444-854C-E2C1A6950F92<br>++ MODULE_TYPE = DXE_DRIVER<br>++ VERSION_STRING = 1.0<br>++ LIBRARY_CLASS = PlatformBdsLib|DXE_DRIVER<br>++<br>++[Sources]<br>++ BdsPlatform.c<br>++ PlatformData.c<br>++ BdsPlatform.h<br>++<br>++[Packages]<br>++ MdePkg/MdePkg.dec<br>++ MdeModulePkg/MdeModulePkg.dec<br>++ CorebootModulePkg/CorebootModulePkg.dec<br>++ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec<br>++<br>++[LibraryClasses]<br>++ BaseLib<br>++ MemoryAllocationLib<br>++ UefiBootServicesTableLib<br>++ BaseMemoryLib<br>++ DebugLib<br>++ PcdLib<br>++ GenericBdsLib<br>++ HobLib<br>++ UefiLib<br>++ DevicePathLib<br>++<br>++[Guids]<br>++ gEfiGlobalVariableGuid<br>++ gEfiPciExpressBaseAddressGuid<br>++ gEfiAcpi20TableGuid<br>++ gEfiMpsTableGuid<br>++ gEfiSmbiosTableGuid<br>++ gEfiAcpiTableGuid<br>++ gLdrMemoryDescriptorGuid<br>++<br>++[Pcd]<br>++ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut<br>++ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile<br>++<br>+diff --git a/CorebootModulePkg/Library/CorebootBdsLib/PlatformData.c b/CorebootModulePkg/Library/CorebootBdsLib/PlatformData.c<br>+new file mode 100644<br>+index 0000000000..fbdcc7de81<br>+--- /dev/null<br>++++ b/CorebootModulePkg/Library/CorebootBdsLib/PlatformData.c<br>+@@ -0,0 +1,161 @@<br>++/*++<br>++<br>++Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR><br>++This program and the accompanying materials <br>++are licensed and made available under the terms and conditions of the BSD License <br>++which accompanies this distribution. The full text of the license may be found at <br>++http://opensource.org/licenses/bsd-license.php <br>++ <br>++THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, <br>++WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. <br>++<br>++Module Name: <br>++<br>++ PlatformData.c<br>++<br>++Abstract:<br>++ <br>++ Defined the platform specific device path which will be used by<br>++ platform Bbd to perform the platform policy connect.<br>++<br>++--*/<br>++<br>++#include "BdsPlatform.h"<br>++<br>++//<br>++// Predefined platform default time out value<br>++//<br>++UINT16 gPlatformBootTimeOutDefault = 3;<br>++<br>++ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode = gPnpPs2Keyboard;<br>++ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;<br>++UART_DEVICE_PATH gUartDeviceNode = gUart;<br>++VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;<br>++<br>++//<br>++// Predefined platform root bridge<br>++//<br>++PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0 = {<br>++ gPciRootBridge,<br>++ gEndEntire<br>++};<br>++<br>++EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {<br>++ (EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,<br>++ NULL<br>++};<br>++<br>++USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath = {<br>++ {<br>++ {<br>++ MESSAGING_DEVICE_PATH,<br>++ MSG_USB_CLASS_DP,<br>++ {<br>++ (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)),<br>++ (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)<br>++ }<br>++ },<br>++ 0xffff, // VendorId <br>++ 0xffff, // ProductId <br>++ CLASS_HID, // DeviceClass <br>++ SUBCLASS_BOOT, // DeviceSubClass<br>++ PROTOCOL_KEYBOARD // DeviceProtocol<br>++ },<br>++<br>++ { <br>++ END_DEVICE_PATH_TYPE, <br>++ END_ENTIRE_DEVICE_PATH_SUBTYPE, <br>++ {<br>++ END_DEVICE_PATH_LENGTH, <br>++ 0<br>++ }<br>++ }<br>++};<br>++<br>++/*<br>++//<br>++// Platform specific Dummy ISA keyboard device path<br>++//<br>++PLATFORM_DUMMY_ISA_KEYBOARD_DEVICE_PATH gDummyIsaKeyboardDevicePath = {<br>++ gPciRootBridge,<br>++ gPciIsaBridge,<br>++ gPnpPs2Keyboard,<br>++ gEndEntire<br>++};<br>++<br>++//<br>++// Platform specific Dummy ISA serial device path<br>++//<br>++PLATFORM_DUMMY_ISA_SERIAL_DEVICE_PATH gDummyIsaSerialDevicePath = {<br>++ gPciRootBridge,<br>++ gPciIsaBridge,<br>++ gPnp16550ComPort,<br>++ gUart,<br>++ gPcAnsiTerminal,<br>++ gEndEntire<br>++};<br>++<br>++//<br>++// Platform specific Dummy PCI VGA device path<br>++//<br>++PLATFORM_DUMMY_PCI_VGA_DEVICE_PATH gDummyPciVgaDevicePath = {<br>++ gPciRootBridge,<br>++ PCI_DEVICE_PATH_NODE(0, 0x2),<br>++ gEndEntire<br>++};<br>++<br>++//<br>++// Platform specific Dummy PCI serial device path<br>++//<br>++PLATFORM_DUMMY_PCI_SERIAL_DEVICE_PATH gDummyPciSerialDevicePath = {<br>++ gPciRootBridge,<br>++ gP2PBridge,<br>++ PCI_DEVICE_PATH_NODE(0, 0x0),<br>++ gUart,<br>++ gPcAnsiTerminal,<br>++ gEndEntire<br>++};<br>++*/<br>++//<br>++// Predefined platform default console device path<br>++//<br>++BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {<br>++ //<br>++ // need update dynamically<br>++ //<br>++// {<br>++// (EFI_DEVICE_PATH_PROTOCOL *) &gDummyIsaSerialDevicePath,<br>++// (CONSOLE_OUT | CONSOLE_IN | STD_ERROR)<br>++// },<br>++// {<br>++// (EFI_DEVICE_PATH_PROTOCOL *) &gDummyIsaKeyboardDevicePath,<br>++// (CONSOLE_IN | STD_ERROR)<br>++// },<br>++// {<br>++// (EFI_DEVICE_PATH_PROTOCOL *) &gDummyPciVgaDevicePath,<br>++// CONSOLE_OUT<br>++// },<br>++// {<br>++// (EFI_DEVICE_PATH_PROTOCOL *) &gDummyPciSerialDevicePath,<br>++// (CONSOLE_OUT | CONSOLE_IN | STD_ERROR)<br>++// },<br>++ {<br>++ (EFI_DEVICE_PATH_PROTOCOL*) &gUsbClassKeyboardDevicePath, <br>++ CONSOLE_IN<br>++ },<br>++ {<br>++ NULL,<br>++ 0<br>++ }<br>++};<br>++<br>++//<br>++// Predefined platform specific driver option<br>++//<br>++EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[] = { NULL };<br>++<br>++//<br>++// Predefined platform connect sequence<br>++//<br>++EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[] = { NULL };<br>++<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf b/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>+index a39e3999ba..623ff9c344 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>+@@ -95,8 +95,9 @@ INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntime<br>+ <br>+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf<br>+ INF UefiCpuPkg/CpuDxe/CpuDxe.inf<br>+-INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf<br>+-INF MdeModulePkg/Application/UiApp/UiApp.inf<br>++<br>++INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf<br>++<br>+ !if $(USE_HPET_TIMER) == TRUE<br>+ INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf<br>+ !else<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+index e838aca61d..a329b78f08 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+@@ -165,6 +165,7 @@<br>+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf<br>+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf<br>+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf<br>++ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf<br>+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf<br>+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf<br>+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf<br>+@@ -183,7 +184,7 @@<br>+ ResetSystemLib|CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf<br>+ SerialPortLib|CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf<br>+ PlatformHookLib|CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf<br>+- PlatformBootManagerLib|CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf<br>++ PlatformBdsLib|CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+ IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf<br>+ CbPlatformSupportLib|CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf<br>+ <br>+@@ -396,13 +397,12 @@<br>+ #<br>+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf<br>+ UefiCpuPkg/CpuDxe/CpuDxe.inf<br>+- MdeModulePkg/Universal/BdsDxe/BdsDxe.inf<br>+- MdeModulePkg/Application/UiApp/UiApp.inf {<br>++ <br>++ IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf {<br>+ <LibraryClasses><br>+- NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf<br>+- NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf<br>+- NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf<br>++ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf<br>+ }<br>++<br>+ !if $(USE_HPET_TIMER) == TRUE<br>+ PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf<br>+ !else<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+index c25d821fd4..790efd7810 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+@@ -165,6 +165,7 @@<br>+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf<br>+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf<br>+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf<br>++ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf<br>+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf<br>+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf<br>+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf<br>+@@ -183,7 +184,7 @@<br>+ ResetSystemLib|CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf<br>+ SerialPortLib|CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf<br>+ PlatformHookLib|CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf<br>+- PlatformBootManagerLib|CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf<br>++ PlatformBdsLib|CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+ IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf<br>+ CbPlatformSupportLib|CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf<br>+ <br>+@@ -397,13 +398,12 @@<br>+ #<br>+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf<br>+ UefiCpuPkg/CpuDxe/CpuDxe.inf<br>+- MdeModulePkg/Universal/BdsDxe/BdsDxe.inf<br>+- MdeModulePkg/Application/UiApp/UiApp.inf {<br>++ <br>++ IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf {<br>+ <LibraryClasses><br>+- NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf<br>+- NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf<br>+- NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf<br>++ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf<br>+ }<br>++<br>+ !if $(USE_HPET_TIMER) == TRUE<br>+ PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf<br>+ !else<br>+-- <br>+2.13.2.932.g7449e964c-goog<br>+<br>diff --git a/payloads/external/tianocore/patches/03_Library_EndofDXE.patch b/payloads/external/tianocore/patches/03_Library_EndofDXE.patch<br>new file mode 100644<br>index 0000000..02ba42b<br>--- /dev/null<br>+++ b/payloads/external/tianocore/patches/03_Library_EndofDXE.patch<br>@@ -0,0 +1,86 @@<br>+From 760f1cafdd689beedc8418ab89e856b54296389c Mon Sep 17 00:00:00 2001<br>+From: CoolStar <coolstarorganization@gmail.com><br>+Date: Sun, 4 Dec 2016 12:07:30 -0800<br>+Subject: [PATCH] CorebootBdsLib: Call End of DXE event to allow booting 3rd<br>+ party efi binaries.<br>+<br>+---<br>+ .../Library/CorebootBdsLib/BdsPlatform.c | 42 ++++++++++++++++++++++<br>+ .../Library/CorebootBdsLib/PlatformBds.inf | 1 +<br>+ 2 files changed, 43 insertions(+)<br>+<br>+diff --git a/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c<br>+index b6253a17f8..cf3e5320cb 100644<br>+--- a/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c<br>++++ b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c<br>+@@ -1129,6 +1129,46 @@ Returns:<br>+ Status = BaseMemoryTest (MemoryTestLevel);<br>+ }<br>+ <br>++VOID<br>++EFIAPI<br>++InternalBdsEmptyCallbackFuntion (<br>++ IN EFI_EVENT Event,<br>++ IN VOID *Context<br>++ )<br>++{<br>++ return;<br>++}<br>++<br>++VOID<br>++InstallReadyToLock (<br>++ VOID<br>++ )<br>++{<br>++ EFI_STATUS Status;<br>++ EFI_EVENT EndOfDxeEvent;<br>++<br>++ DEBUG((DEBUG_INFO,"InstallReadyToLock entering......\n"));<br>++ //<br>++ // Inform the SMM infrastructure that we're entering BDS and may run 3rd party code hereafter<br>++ // Since PI1.2.1, we need signal EndOfDxe as ExitPmAuth<br>++ //<br>++ Status = gBS->CreateEventEx (<br>++ EVT_NOTIFY_SIGNAL,<br>++ TPL_CALLBACK,<br>++ InternalBdsEmptyCallbackFuntion,<br>++ NULL,<br>++ &gEfiEndOfDxeEventGroupGuid,<br>++ &EndOfDxeEvent<br>++ );<br>++ ASSERT_EFI_ERROR (Status);<br>++ gBS->SignalEvent (EndOfDxeEvent);<br>++ gBS->CloseEvent (EndOfDxeEvent);<br>++ DEBUG((DEBUG_INFO,"All EndOfDxe callbacks have returned successfully\n"));<br>++<br>++ DEBUG((DEBUG_INFO,"InstallReadyToLock end\n"));<br>++ return;<br>++}<br>++<br>+ VOID<br>+ EFIAPI<br>+ PlatformBdsPolicyBehavior (<br>+@@ -1164,6 +1204,8 @@ Returns:<br>+ EFI_INPUT_KEY Key;<br>+ EFI_BOOT_MODE BootMode;<br>+ <br>++ InstallReadyToLock();<br>++<br>+ //<br>+ // Init the time out value<br>+ //<br>+diff --git a/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf b/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+index 578c74afae..992bd846bd 100644<br>+--- a/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>++++ b/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf<br>+@@ -58,6 +58,7 @@<br>+ gEfiSmbiosTableGuid<br>+ gEfiAcpiTableGuid<br>+ gLdrMemoryDescriptorGuid<br>++ gEfiEndOfDxeEventGroupGuid<br>+ <br>+ [Pcd]<br>+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut<br>+-- <br>+2.13.2.725.g09c95d1e9-goog<br>+<br>diff --git a/payloads/external/tianocore/patches/04_CorebootPayloadPkg_addps2.patch b/payloads/external/tianocore/patches/04_CorebootPayloadPkg_addps2.patch<br>new file mode 100644<br>index 0000000..e90b70e<br>--- /dev/null<br>+++ b/payloads/external/tianocore/patches/04_CorebootPayloadPkg_addps2.patch<br>@@ -0,0 +1,56 @@<br>+From 77c5dfcce842819215490fe63c481860fa7d752d Mon Sep 17 00:00:00 2001<br>+From: CoolStar <coolstarorganization@gmail.com><br>+Date: Sun, 4 Dec 2016 11:50:00 -0800<br>+Subject: [PATCH] CorebootPayloadPkg: Add PS/2 keyboard drivers.<br>+<br>+---<br>+ CorebootPayloadPkg/CorebootPayloadPkg.fdf | 3 +++<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 3 +++<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 3 +++<br>+ 3 files changed, 9 insertions(+)<br>+<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf b/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>+index 347e9c75ce..a347af0c9a 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf<br>+@@ -132,6 +132,9 @@ INF DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf<br>+ # ISA Support<br>+ #<br>+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf<br>++INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf<br>++INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf<br>++INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf<br>+ <br>+ #<br>+ # Console Support<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+index 5ce823bb95..60ee064c59 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+@@ -492,6 +492,9 @@<br>+ # ISA Support<br>+ #<br>+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf<br>++ PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf<br>++ IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf<br>++ IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf<br>+ <br>+ #<br>+ # Console Support<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+index fea297a77a..167329c897 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+@@ -493,6 +493,9 @@<br>+ # ISA Support<br>+ #<br>+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf<br>++ PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf<br>++ IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf<br>++ IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf<br>+ <br>+ #<br>+ # Console Support<br>+-- <br>+2.13.2.725.g09c95d1e9-goog<br>+<br>diff --git a/payloads/external/tianocore/patches/05_CorebootPayloadPkg_noserial.patch b/payloads/external/tianocore/patches/05_CorebootPayloadPkg_noserial.patch<br>new file mode 100644<br>index 0000000..0e84b7d<br>--- /dev/null<br>+++ b/payloads/external/tianocore/patches/05_CorebootPayloadPkg_noserial.patch<br>@@ -0,0 +1,39 @@<br>+From 77f75370d6fbfefb04456f6e1c32c85d4bac8bf5 Mon Sep 17 00:00:00 2001<br>+From: Matt Devo <matt.devillier@gmail.com><br>+Date: Thu, 23 Feb 2017 14:11:14 -0600<br>+Subject: [PATCH] CorebootPayloadPkg: don't use serial output<br>+<br>+---<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 2 +-<br>+ CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 2 +-<br>+ 2 files changed, 2 insertions(+), 2 deletions(-)<br>+<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+index 1d80fc4f5c..ce360c9e9e 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc<br>+@@ -261,7 +261,7 @@<br>+ #<br>+ ################################################################################<br>+ [PcdsFeatureFlag]<br>+- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE<br>++ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE<br>+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE<br>+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE<br>+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE<br>+diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+index 52b26eb3d0..a27b0873a1 100644<br>+--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>++++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc<br>+@@ -261,7 +261,7 @@<br>+ #<br>+ ################################################################################<br>+ [PcdsFeatureFlag]<br>+- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE<br>++ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE<br>+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE<br>+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE<br>+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE<br>+-- <br>+2.13.2.725.g09c95d1e9-goog<br>+<br></pre><p>To view, visit <a href="https://review.coreboot.org/20639">change 20639</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20639"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4eaa602418995a68753b1ed13af8c6374eaa312f </div>
<div style="display:none"> Gerrit-Change-Number: 20639 </div>
<div style="display:none"> Gerrit-PatchSet: 3 </div>
<div style="display:none"> Gerrit-Owner: Evelyn Huang <evhuang@google.com> </div>