<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20548">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">device/pci_rom: Write _ROM method for VGA devices<br><br>Write _ROM method and store PCI option rom in CBMEM.<br><br>Change-Id: I548b730fb64833083cc05af5b21dd6959804224b<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/commonlib/include/commonlib/cbmem_id.h<br>M src/device/pci_device.c<br>M src/device/pci_rom.c<br>M src/include/device/pci_rom.h<br>4 files changed, 68 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/20548/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h<br>index 2c9b3c3..a7fb154 100644<br>--- a/src/commonlib/include/commonlib/cbmem_id.h<br>+++ b/src/commonlib/include/commonlib/cbmem_id.h<br>@@ -70,6 +70,10 @@<br> #define CBMEM_ID_WIFI_CALIBRATION 0x57494649<br> #define CBMEM_ID_EC_HOSTEVENT  0x63ccbbc3<br> #define CBMEM_ID_EXT_VBT   0x69866684<br>+#define CBMEM_ID_ROM0              0x524f4d30<br>+#define CBMEM_ID_ROM1              0x524f4d31<br>+#define CBMEM_ID_ROM2              0x524f4d32<br>+#define CBMEM_ID_ROM3              0x524f4d33<br> <br> #define CBMEM_ID_TO_NAME_TABLE                           \<br>    { CBMEM_ID_ACPI,                "ACPI       " }, \<br>diff --git a/src/device/pci_device.c b/src/device/pci_device.c<br>index 75e9a79..f08f95c 100644<br>--- a/src/device/pci_device.c<br>+++ b/src/device/pci_device.c<br>@@ -744,6 +744,7 @@<br>        .enable_resources = pci_dev_enable_resources,<br> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)<br>       .write_acpi_tables = pci_rom_write_acpi_tables,<br>+      .acpi_fill_ssdt_generator = pci_rom_ssdt,<br> #endif<br>    .init             = pci_dev_init,<br>     .scan_bus         = 0,<br>diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c<br>index 6456d17..c798f92 100644<br>--- a/src/device/pci_rom.c<br>+++ b/src/device/pci_rom.c<br>@@ -25,6 +25,8 @@<br> #include <device/pci_ops.h><br> #include <string.h><br> #include <cbfs.h><br>+#include <cbmem.h><br>+#include <arch/acpigen.h><br> <br> /* Rmodules don't like weak symbols. */<br> u32 __attribute__((weak)) map_oprom_vendev(u32 vendev) { return vendev; }<br>@@ -267,4 +269,63 @@<br> <br>       return current;<br> }<br>+<br>+void pci_rom_ssdt(device_t device)<br>+{<br>+      struct rom_header *rom;<br>+      const char *scope;<br>+   size_t cbrom_length;<br>+ void *cbrom;<br>+ static size_t ngfx;<br>+<br>+       /* Only handle VGA devices */<br>+        if ((device->class >> 8) != PCI_CLASS_DISPLAY_VGA)<br>+          return;<br>+<br>+   /* Only handle enabled devices */<br>+    if (!device->enabled)<br>+             return;<br>+<br>+   /* Probe for option rom */<br>+   rom = pci_rom_probe(device);<br>+ if (!rom || !rom->size) {<br>+         printk(BIOS_ERR, "%s: Missing ROM\n", dev_path(device));<br>+           return;<br>+      }<br>+<br>+ scope = acpi_device_path(device);<br>+    if (!scope) {<br>+                printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));<br>+            return;<br>+      }<br>+<br>+ /* Supports up to four devices. */<br>+   if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {<br>+             printk(BIOS_ERR, "ERROR: Out of CBMEM IDs.\n");<br>+            return;<br>+      }<br>+<br>+ /* Prepare memory */<br>+ cbrom_length = DIV_ROUND_UP(rom->size * 512, 0x10000) * 0x10000;<br>+  if (cbrom_length > 0x40000) {<br>+             printk(BIOS_ERR, "ERROR: ROM of size 0x%x not supported.\n",<br>+                      cbrom_length);<br>+                return;<br>+      }<br>+<br>+ cbrom = cbmem_add(CBMEM_ID_ROM0 + ngfx, cbrom_length);<br>+       if (!cbrom) {<br>+                printk(BIOS_ERR, "ERROR: Failed to allocate CBMEM.\n");<br>+            return;<br>+      }<br>+    memset(cbrom, 0, cbrom_length);<br>+      memcpy(cbrom, rom, rom->size * 512);<br>+<br>+   /* Write SSDT */<br>+<br>+  /* Device is known, only add _ROM method */<br>+  acpigen_write_scope(scope);<br>+  acpigen_write_rom(cbrom, cbrom_length);<br>+      acpigen_pop_len(); /* pop scope */<br>+}<br> #endif<br>diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h<br>index c5ace4c..44d8917 100644<br>--- a/src/include/device/pci_rom.h<br>+++ b/src/include/device/pci_rom.h<br>@@ -43,6 +43,8 @@<br>                                             unsigned long current,<br>                                                struct acpi_rsdp *rsdp);<br> <br>+void pci_rom_ssdt(device_t device);<br>+<br> u32 map_oprom_vendev(u32 vendev);<br> <br> #endif<br></pre><p>To view, visit <a href="https://review.coreboot.org/20548">change 20548</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I548b730fb64833083cc05af5b21dd6959804224b </div>
<div style="display:none"> Gerrit-Change-Number: 20548 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>