<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20541">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/fsp: Rearrange post codes for FSP phase indication<br><br>This patch will make it more consistent to debug FSP hang<br>and reset issues.<br><br>Bug=none<br>Branch=none<br>TEST=Build and Boot on eve<br><br>Change-Id: I93004a09c2a3a97ac9458a0f686ab42415af19fb<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/drivers/intel/fsp2_0/memory_init.c<br>M src/drivers/intel/fsp2_0/silicon_init.c<br>M src/include/console/post_codes.h<br>3 files changed, 21 insertions(+), 7 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/20541/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c<br>index 424a325..6d12047 100644<br>--- a/src/drivers/intel/fsp2_0/memory_init.c<br>+++ b/src/drivers/intel/fsp2_0/memory_init.c<br>@@ -360,7 +360,7 @@<br>         post_code(POST_FSP_MEMORY_INIT);<br>      timestamp_add_now(TS_FSP_MEMORY_INIT_START);<br>  status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());<br>- post_code(POST_FSP_MEMORY_INIT);<br>+     post_code(POST_FSP_MEMORY_EXIT);<br>      timestamp_add_now(TS_FSP_MEMORY_INIT_END);<br> <br>         fsp_debug_after_memory_init(status);<br>diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c<br>index 9f0bf7c..bda88d1 100644<br>--- a/src/drivers/intel/fsp2_0/silicon_init.c<br>+++ b/src/drivers/intel/fsp2_0/silicon_init.c<br>@@ -49,7 +49,7 @@<br>  post_code(POST_FSP_SILICON_INIT);<br>     status = silicon_init(&upd);<br>      timestamp_add_now(TS_FSP_SILICON_INIT_END);<br>-  post_code(POST_FSP_SILICON_INIT);<br>+    post_code(POST_FSP_SILICON_EXIT);<br> <br>  fsp_debug_after_silicon_init(status);<br> <br>diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h<br>index 1368aa8..d10cf38 100644<br>--- a/src/include/console/post_codes.h<br>+++ b/src/include/console/post_codes.h<br>@@ -238,39 +238,53 @@<br> #define POST_FSP_MEMORY_INIT                 0x92<br> <br> /**<br>+ * \brief After calling FSP MemoryInit<br>+ *<br>+ * FSP binary returned from MemoryInit phase<br>+ */<br>+#define POST_FSP_MEMORY_EXIT                 0x93<br>+<br>+/**<br>  * \brief Before calling FSP SiliconInit<br>  *<br>  * Going to call into FSP binary for SiliconInit phase<br>  */<br>-#define POST_FSP_SILICON_INIT                    0x93<br>+#define POST_FSP_SILICON_INIT                    0x94<br>+<br>+/**<br>+ * \brief After calling FSP SiliconInit<br>+ *<br>+ * FSP binary returned from SiliconInit phase<br>+ */<br>+#define POST_FSP_SILICON_EXIT                      0x95<br> <br> /**<br>  * \brief Before calling FSP Notify before resource allocation<br>  *<br>  * Going to call into FSP binary for Notify phase<br>  */<br>-#define POST_FSP_NOTIFY_BEFORE_ENUMERATE        0x94<br>+#define POST_FSP_NOTIFY_BEFORE_ENUMERATE 0x96<br> <br> /**<br>  * \brief Before calling FSP Notify before finalize<br>  *<br>  * Going to call into FSP binary for Notify phase<br>  */<br>-#define POST_FSP_NOTIFY_BEFORE_FINALIZE            0x95<br>+#define POST_FSP_NOTIFY_BEFORE_FINALIZE          0x97<br> <br> /**<br>  * \brief Indicate OS _PTS entry<br>  *<br>  * Called from _PTS asl method<br>  */<br>-#define POST_OS_ENTER_PTS                        0x96<br>+#define POST_OS_ENTER_PTS                        0x98<br> <br> /**<br>  * \brief Indicate OS _WAK entry<br>  *<br>  * Called from within _WAK method<br>  */<br>-#define POST_OS_ENTER_WAKE                    0x97<br>+#define POST_OS_ENTER_WAKE                       0x99<br> <br> /**<br>  * \brief Entry into elf boot<br></pre><p>To view, visit <a href="https://review.coreboot.org/20541">change 20541</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20541"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I93004a09c2a3a97ac9458a0f686ab42415af19fb </div>
<div style="display:none"> Gerrit-Change-Number: 20541 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>