<p>Iru Cai has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20486">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">autoport: move spi_uvscc and spi_lvscc to devicetree.cb<br><br>Change-Id: I36866cc793b3ddf9a78fed2e2840958d08327e7d<br>Signed-off-by: Iru Cai <mytbk920423@gmail.com><br>---<br>M util/autoport/bd82x6x.go<br>1 file changed, 2 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/20486/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go<br>index 026ae51..0186564 100644<br>--- a/util/autoport/bd82x6x.go<br>+++ b/util/autoport/bd82x6x.go<br>@@ -179,10 +179,6 @@<br> <br>        /* SPI init */<br>        MainboardIncludes = append(MainboardIncludes, "southbridge/intel/bd82x6x/pch.h")<br>-   /* FIXME:XX Move this to runtime.  */<br>-        for _, addr := range []uint16{0x38c8, 0x38c4} {<br>-              MainboardInit += fmt.Sprintf("\tRCBA32(0x%04x) = 0x%08x;\n", addr, inteltool.RCBA[addr])<br>-   }<br> <br>  FADT := ctx.InfoSource.GetACPI()["FACP"]<br> <br>@@ -220,6 +216,8 @@<br>                    "p_cnt_throttling_supported": (FormatBool(FADT[104] == 1 && FADT[105] == 3)),<br>                       "c2_latency":                 FormatHexLE16(FADT[96:98]),<br>                   "docking_supported":          (FormatBool((FADT[113] & (1 << 1)) != 0)),<br>+                 "spi_uvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c8]),<br>+                        "spi_lvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c4] &^ (1 << 23)),<br>          },<br>            PCISlots: []PCISlot{<br>                  PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: false, additionalComment: "USB 3.0 Controller"},<br></pre><p>To view, visit <a href="https://review.coreboot.org/20486">change 20486</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20486"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I36866cc793b3ddf9a78fed2e2840958d08327e7d </div>
<div style="display:none"> Gerrit-Change-Number: 20486 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Iru Cai <mytbk920423@gmail.com> </div>