<p>Martin Kepplinger has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20415">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge/northbridge.c: remove unnecessary null check<br><br>Checking for NULL here doesn't help here. We *rely* on cdb_dev to exist<br>directly before this check. Coverity had found this:<br><br>*** CID 1376664:  Null pointer dereferences  (REVERSE_INULL)<br>/src/soc/amd/stoneyridge/northbridge.c: 666 in cpu_bus_scan()<br>660         * this silicon. It is an SOC and can't have  >= 16 APICs, but<br>661               * we will start numbering at 0x10. We also know there is only<br>662              * on physical node (module in AMD speak).<br>663          */<br>664<br>665          lapicid_start = 0x10; /* Get this from devicetree? see comment above. */<br><br>CID 1376664:  Null pointer dereferences  (REVERSE_INULL)<br>Null-checking "cdb_dev" suggests that it may be null, but it has already been<br>dereferenced on all paths leading to the check.<br><br>666           enable_node = cdb_dev && cdb_dev->enabled;<br>667      cpu_bus = dev->link_list;<br>668<br>669          for (j = 0; j <= siblings; j++ ) {<br>670              apic_id = lapicid_start + j;<br>671               printk(BIOS_SPEW, "lapicid_start 0x%x, node 0x%x,  core 0x%x,  apicid=0x%x\n",<br><br>Change-Id: Ic6a53df8b8d1596ad0eb1d8f0fa200cccf9509cf<br>Signed-off-by: Martin Kepplinger <martink@posteo.de><br>---<br>M src/soc/amd/stoneyridge/northbridge.c<br>1 file changed, 1 insertion(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/20415/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c<br>index 009c6df..fac966f 100644<br>--- a/src/soc/amd/stoneyridge/northbridge.c<br>+++ b/src/soc/amd/stoneyridge/northbridge.c<br>@@ -676,7 +676,7 @@<br>      */<br> <br>       lapicid_start = 0x10; /* Get this from devicetree? see comment above. */<br>-     enable_node = cdb_dev && cdb_dev->enabled;<br>+        enable_node = cdb_dev->enabled;<br>    cpu_bus = dev->link_list;<br> <br>       for (j = 0 ; j <= siblings ; j++) {<br></pre><p>To view, visit <a href="https://review.coreboot.org/20415">change 20415</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20415"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic6a53df8b8d1596ad0eb1d8f0fa200cccf9509cf </div>
<div style="display:none"> Gerrit-Change-Number: 20415 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Martin Kepplinger <martink@posteo.de> </div>